LCD Transistor Layout With Fewer Lithography Steps
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Solution Overview
Problem
Conventional methods for manufacturing transistors in liquid crystal display devices require a large number of photolithography steps, leading to increased complexity, cost, and potential yield reduction, while also compromising electric characteristics.
Innovation Solution
The process is simplified by reducing the number of photolithography steps and photomasks, using a semiconductor device structure with a gate electrode, source and drain electrodes, and a pixel electrode, where the semiconductor layer overlaps with wiring and capacitor wiring, and the capacitor wiring extends beyond the pixel electrode, preventing parasitic transistor formation and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography steps are used for manufacturing transistors, then manufacturing precision can be maintained, but the number of steps increases significantly leading to reduced productivity and increased cost
Solution Approach 1:
The patent combines multiple photolithography steps into a single step by using a multi-layer resist structure where a first resist layer and a second resist layer are formed and processed together. This allows simultaneous definition of the gate electrode pattern and the source/drain electrode pattern, reducing the total number of photolithography steps from five or more to just one or two, thereby significantly improving productivity while maintaining manufacturing precision.
Solution Approach 2:
The patent segments the resist structure into multiple layers (first resist layer and second resist layer) with different functions. The first resist layer is used for forming the gate electrode pattern, while the second resist layer is used for forming the source/drain electrode pattern. This segmentation allows each layer to be optimized for its specific purpose and enables complex patterns to be formed in a single photolithography step.
2Productivity
If the number of photolithography steps is reduced, then productivity increases and cost decreases, but manufacturing precision and electric characteristics may be compromised
Solution Approach 1:
The patent performs preliminary actions by forming the first resist layer and second resist layer in sequence before the actual photolithography exposure. The first resist layer is formed and dried, then the second resist layer is formed on top of it. This preliminary preparation ensures that when the single photolithography step is performed, both layers can be exposed and developed simultaneously with high precision, maintaining manufacturing precision while improving productivity.
Solution Approach 2:
The patent applies local quality by giving different properties to different parts of the resist structure. The first resist layer has properties optimized for gate electrode pattern formation, while the second resist layer has properties optimized for source/drain electrode pattern formation. This allows each region of the resist structure to contribute differently to the final pattern, ensuring high manufacturing precision even with reduced photolithography steps.
3Reliability
If capacitor wiring extends beyond pixel electrode, then parasitic transistor formation is prevented, but device complexity increases
Solution Approach 1:
The patent extracts the problematic overlap region between the capacitor wiring and pixel electrode by extending the capacitor wiring beyond the pixel electrode boundary. This creates a clear separation where the capacitor wiring does not overlap with the pixel electrode in the active area, thereby preventing parasitic transistor formation. The extended wiring is routed to a region where it does not interfere with the pixel electrode function.
Data Source
AI summary
Photolithography and etching steps for forming an island-shaped semiconductor layer are omitted, and a liquid crystal display device is manufactured with four photolithography steps: a step of forming a gate electrode (including a wiring formed using the same layer as the gate electrode), a step of forming source and drain electrodes (including a wiring formed using the same layer as the source and drain electrodes), a step of forming a contact hole (including the removal of an insulating layer and the like in a region other than the contact hole), and a step of forming a pixel electrode (including a wiring formed using the same layer as the pixel electrode). By the reduction in the number of photolithography steps, a liquid crystal display device can be provided at low cost and high productivity. Formation of a parasitic channel is prevented by an improvement in shape and potential of a wiring.