Voltage Generation Circuit for LCD Data Drive Power Reduction
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Solution Overview
Problem
The increasing power consumption and temperature of data drive chips in high-resolution liquid crystal televisions pose a challenge, as existing solutions like increasing chip size and using cooling sheets significantly raise costs.
Innovation Solution
A voltage generation circuit comprising a control unit, a controlled unit, and an output unit, which generates a first drive voltage with a preset delay and a second drive voltage with a non-preset delay, reducing the overall power consumption by outputting a smaller initial drive voltage to the data drive chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the chip size is increased and cooling sheets are added, then the temperature control is improved, but the manufacturing cost increases tremendously
Solution Approach 1:
The patent changes the voltage parameter dynamically by introducing a first drive voltage (lower) and a second drive voltage (higher). The control unit switches between these voltage levels based on timing signals, thereby changing the operating parameters of the data drive chip to reduce power consumption and temperature without physical modifications to the chip or additional cooling components.
2Use of energy by moving object
If the drive voltage is decreased to lower power consumption, then the energy efficiency is improved, but the drive capability may be insufficient
Solution Approach 1:
The patent implements periodic switching between the first drive voltage and the second drive voltage based on timing signals from the control unit. This periodic action allows the system to operate at lower power consumption for extended periods while periodically providing higher drive capability when needed, thereby balancing energy efficiency with drive performance requirements.
Data Source
AI summary
The present invention provides a voltage generation circuit, comprising a control unit, a controlled unit and an output unit, and the control unit receives a trigger signal to generate a control signal having a preset delay, and the control unit is further coupled to the controlled unit to control the controlled unit to be in a first state in a duration of the preset delay and to be in a second state in a duration of a non-preset delay, and the output unit outputs a first drive voltage to the drive unit as the controlled unit is in the first state and to output a second drive voltage to the drive unit as the controlled unit is in the second state, and the first drive voltage is smaller than the second drive voltage to achieve decreasing the drive voltage to lower power consumption of the data drive chip.