LCID-Tagged ITLB Entries for Dynamic Library Code Sharing
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Solution Overview
Problem
Existing processors experience significant instruction translation lookaside buffer (ITLB) overheads due to high ITLB misses in dynamic code libraries, particularly in datacenter and cloud environments, where shared libraries are not efficiently shared across applications due to non-identical virtual to physical address mappings and per-process tagged TLB entries.
Innovation Solution
Implementing a library context identification (LCID) field in the ITLB, combined with a hardware-software co-design, to share ITLB entries across applications by ensuring identical virtual to physical address mappings for shared dynamic libraries, reducing the number of required entries from (processes * libraries) to (libraries).
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If per-process tagged TLB entries are used to maintain process isolation, then process security and isolation are improved, but ITLB overhead increases and shared library performance deteriorates
Solution Approach 1:
The patent segments the TLB entry tagging mechanism into two independent fields: PCID (Process Context ID) for process isolation and LCID (Library Context ID) for library identification. This segmentation allows the system to independently manage process-specific and library-specific context information, enabling shared library translations to be cached across processes without compromising process isolation, thereby reducing ITLB overhead while maintaining security.
Solution Approach 2:
The patent adds a new dimension (LCID field) to the existing TLB entry structure alongside the traditional PCID field. This dimensional extension allows the TLB to distinguish between different library instances within the same process context, enabling fine-grained sharing of library translations across processes while maintaining process-specific isolation through the PCID field.
2Reliability
If virtual address mappings are made non-identical across processes for security, then process security is improved, but TLB sharing efficiency deteriorates
Solution Approach 1:
The patent segments the virtual address space management into process-level (PCID) and library-level (LCID) components. This allows the system to maintain non-identical virtual addresses for different processes (maintaining security) while identifying identical library content through the LCID field, enabling selective sharing of translation entries without requiring identical virtual address mappings across processes.
Solution Approach 2:
The LCID field acts as an intermediary that bridges the gap between process-specific virtual address spaces and shared library content. It enables the system to recognize identical library translations across different process contexts without requiring the virtual addresses themselves to be identical, thus maintaining both security and sharing efficiency.
3Speed
If ITLB entries are increased to reduce misses, then instruction translation speed is improved, but memory usage and TLB overhead increase
Solution Approach 1:
The patent makes TLB entries universal by introducing the LCID field that enables a single TLB entry to serve multiple processes simultaneously when they share the same library. The LCID field allows the TLB to identify library-specific translations that can be reused across process boundaries, increasing the effective utilization of each TLB entry and reducing the total number of entries needed to achieve the same translation throughput.
Data Source
AI summary
Circuitry and methods for reducing instruction translation lookaside buffer overheads for dynamic code libraries are described. In certain examples, a computer system includes an execution circuitry; a register to store a library context identifier value; and a memory management circuit to: determine, for an instruction comprising a virtual address, an entry in an instruction translation lookaside buffer that comprises a mapping of the virtual address to a physical address, and a library context identifier value, compare the library context identifier value from the register to the library context identifier value from the entry of the instruction translation lookaside buffer, and in response to the mapping being found for the virtual address and the library context identifier value from the register matching the library context identifier value from the entry of the instruction translation lookaside buffer, cause the execution circuitry to execute the instruction from the physical address.