LCOS Display Filling Pattern for Striation Defect Reduction

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Solution Overview

Problem

The manufacturing process of liquid crystal on silicon (LCOS) displays is prone to striation defects due to the uneven surface of silicon chips, which affects the formation of alignment films and subsequently the performance of the displays.

Innovation Solution

The implementation of a filling pattern with through holes within the dielectric layer openings on the silicon substrate, which helps in creating a relatively even surface for alignment film formation and ensures proper electrical connection of conductors to pads, thereby reducing the likelihood of striation defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If an alignment film is formed directly on the silicon chip surface, then the manufacturing process is simple, but striation defects occur due to the uneven surface

Engineering Contradiction:
Improvealignment film formation processVSAvoidsurface uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A planarization layer is formed on the silicon chip surface before forming the alignment film. This preliminary action creates a flat surface that eliminates the unevenness causing striation defects, while still allowing subsequent alignment film formation to proceed with relatively simple processes

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The planarization layer acts as an intermediary between the uneven silicon chip surface and the alignment film. It mediates the surface uniformity issue by providing a flat interface for alignment film deposition, preventing direct contact between the alignment film and the problematic uneven silicon surface

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the silicon chip surface is left uneven, then the manufacturing process remains simple, but the alignment film quality deteriorates

Engineering Contradiction:
Improvestructure complexityVSAvoidalignment film formation reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The planarization layer is formed as a preliminary structure before alignment film deposition. This additional layer, while increasing structural complexity, ensures reliable alignment film formation by providing a uniform surface, thereby improving manufacturing reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The planarization layer is specifically applied to the regions where alignment film formation occurs. It provides localized surface uniformity where needed, maintaining overall device functionality while ensuring reliable alignment film formation in critical areas

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If conductors are directly connected to pads, then the electrical connection is straightforward, but connection reliability is reduced due to surface unevenness

Engineering Contradiction:
Improveelectrical connection processVSAvoidelectrical connection reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The planarization layer is formed beforehand to create a flat surface for conductor placement. This preliminary action ensures that conductors make reliable contact with pads despite the underlying silicon surface unevenness, improving connection reliability without significantly complicating the manufacturing process

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11415844B2Liquid crystal display
Publication Date: 2022.08.16 HIMAX TECH LTD
  • US11415844B2 patent drawing
  • US11415844B2 patent drawing
  • US11415844B2 patent drawing

AI summary

A liquid crystal display includes a first substrate, a pixel array, a first pad, a dielectric layer, a filling pattern, a first conductor, a second substrate and a liquid crystal layer. The first substrate has a display area and a pad area located outside the display area. The pixel array is disposed on the display area. The first pad is disposed on the pad area. The dielectric layer has a first opening overlapped with the first pad. The filling pattern is disposed within the first opening of the dielectric layer. The filling pattern has through holes, and the through holes of the filling pattern are overlapped with the first pads. The first conductor is disposed in the first opening of the dielectric layer, and is electrically connected to the first pad via the through holes of the filling pattern.