LCoS Pixel Structure Shared Metal Contact Design
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Solution Overview
Problem
Existing Liquid Crystal on Silicon (LCoS) display pixel structures face challenges in miniaturization due to digital pixel size limitations and suffer from power instability and reduced color quality due to parasitic resistances and capacitances in analog pixels, affecting contrast ratio and saturation.
Innovation Solution
The proposed LCoS display pixel structure includes a switch transistor, storage capacitor, and reset transistor with active areas and polysilicon, featuring a shared metal contact for adjacent pixels, which allows for a larger design flexibility and minimizes active area, reducing leakage current and parasitic components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a digital pixel is configured into an inverter latch of PMOS and NMOS transistor, then the pixel can be miniaturized, but the pixel size cannot be reduced to microminiaturize each pixel and process margin is obstructed
Solution Approach 1:
The patent changes the fundamental parameter of pixel configuration from digital inverter latch to analog pixel structure with transistor and capacitor. This parameter change enables microminiaturization while maintaining process margin through optimized analog circuit design and layout arrangements.
2Device complexity
If a digital pixel is configured as an inverter latch, then the pixel structure is simplified, but short circuit current flows to destabilize power supply causing power bouncing or power deep phenomenon
Solution Approach 1:
The patent replaces the digital inverter latch mechanism with an analog pixel structure using transistor and capacitor. This substitution eliminates the short circuit current issue inherent in inverter latches while maintaining structural simplicity through optimized analog circuit configuration.
3Device complexity
If an analog pixel is composed of one transistor and one capacitor, then the pixel structure is simplified, but parasitic resistances and parasitic capacitances effect impediment disabling the pixel from obtaining 100% charge
Solution Approach 1:
The patent extracts and minimizes parasitic elements by optimizing the layout arrangement of transistor and capacitor. The layout is designed to reduce parasitic resistances and capacitances, enabling the pixel to achieve 100% charge while maintaining structural simplicity.
4Ease of manufacture
If parasitic resistances and parasitic capacitances are present in analog pixel, then the pixel structure is practical, but contrast ratio, saturation and color quality are adversely affected
Solution Approach 1:
The patent applies local quality optimization by designing specific layout arrangements for transistor and capacitor that minimize parasitic effects in critical regions. The layout is optimized to reduce parasitic resistances and capacitances that affect contrast ratio, saturation, and color quality while maintaining practical manufacturability.
Data Source
AI summary
An LCoS display pixel structure is disclosed. According to at least one embodiment, the present disclosure provides an LCoS display pixel structure which implements a pattern or geometry having an analog pixel structure in a display having micro-display LCoS structures.