LCOS Pixel Modulation With SRAM Latches for Leakage-Free Gray Scale
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Solution Overview
Problem
Existing analog and digital LCOS displays face challenges in maintaining accurate pixel voltages due to leakage and slow charging times, respectively, which affect image quality and efficiency, especially in small pixel displays.
Innovation Solution
A pixel array architecture with digital circuitry that allows for independent and local modulation of pixel voltages using a waveform generator and SRAM latches, enabling rapid data storage and high-frequency voltage waveforms to achieve continuous gray-scale and phase modulation without leakage or temporal overlap.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If analog pixel circuitry is used, then gray-scale reproduction is straightforward, but leakage causes voltage droop and errors in small pixels
Solution Approach 1:
The patent replaces the analog voltage storage mechanism with a digital latch-based system. Each pixel uses a latch circuit that stores digital data (0 or 1) rather than analog voltage, eliminating leakage-induced droop while maintaining gray-scale control through sequential bit-plane writing. This substitution of analog storage with digital storage resolves the contradiction between ease of gray-scale reproduction and voltage retention reliability.
Solution Approach 2:
The patent changes the fundamental parameter of pixel state representation from continuous analog voltage to discrete digital states. By using latches that store binary data and sequentially writing bit-planes, the system achieves gray-scale modulation through temporal sequencing rather than simultaneous analog voltage control, thereby eliminating leakage effects while maintaining gray-scale capability.
2Adaptability or versatility
If analog pixel circuitry is used, then voltage modulation is variable and continuous, but charging time becomes prohibitively long for high-resolution displays
Solution Approach 1:
The patent segments the voltage modulation process into discrete bit-planes, where each bit-plane represents a specific voltage level and is written to the display array sequentially. This segmentation allows the system to write multiple voltage levels efficiently by processing them in separate, manageable passes, thereby reducing the total write time while maintaining full gray-scale flexibility through the combination of these segmented writes.
Solution Approach 2:
The patent employs periodic action by sequentially cycling through different bit-planes and writing them to the display array in repeated frames. Each frame consists of multiple sequential write operations for different bit-planes, creating a periodic writing pattern that efficiently fills the display with gray-scale information without requiring prohibitively long charge times, thus improving frame write speed while maintaining modulation flexibility.
3Reliability
If digital pixel circuitry is used, then leakage is eliminated, but phase modulation accuracy deteriorates due to temporal overlap and ripple
Solution Approach 1:
The patent applies preliminary action by pre-calculating and pre-programming the exact sequence of bit-planes and their corresponding timing intervals before display operation begins. This preliminary setup ensures that each voltage level is applied for the precise duration needed to achieve accurate phase modulation, preventing temporal overlap and phase ripple while maintaining the leakage-free advantages of digital circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides efficient, high-bit-depth displays with minimal phase ripple and reduced power consumption, suitable for small pixel pitches, eliminating the need for external drivers and overcoming limitations of existing technologies.
Implementation Method 1
The variable voltages on these pixel electrodes in turn determine the response of the Liquid Crystal (LC) directly above each of these pixels. As a result, they ultimately determine (for Amplitude Displays) the amount of polarization change for light reflected from that pixel, or (for Phase Displays) the amount of phase shift applied to the light reflected from that pixel.
Implementation Method 2
The voltage supplied to the pixel electrodes modulates a polarization, reflectivity, amplitude and/or phase of light reflected from the display pixels.
Data Source
AI summary
A system for generating a voltage at a pixel array includes a plurality of display pixels forming the pixel array, each display pixel comprising a pixel circuit for driving the pixel. The system further comprises a row formatter configured to store a plurality of bits representing image data for a row of display pixels of the LCOS array; a row controller configured to write a subset of the plurality of bits representing image data for a pixel of the row into a plurality of data latches of said pixel circuit; and a waveform generator for generating reference pulses represented by a set of reference bits. The pixel circuit is configured to compare each reference bit to corresponding bits stored in the latches of each pixel circuit, and generate voltage at an electrode of each pixel based on this comparison.