LCoS Chip Noise Reduction via Shield Layers
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Solution Overview
Problem
Micro-display devices with LCoS structures face challenges in suppressing electrical noise due to cross-talk and stray light, which affect image quality by degrading contrast and resolution.
Innovation Solution
The design incorporates multiple polycrystalline silicon and metal layers over a silicon substrate, with filling layers and shield portions to minimize cross-talk and a metal layer to block stray light, reducing electrical noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If resolution is increased by increasing the number of pixels, then image quality is improved, but electrical cross-talk and coupling effect between circuit elements increases
Solution Approach 1:
A ground shield layer is introduced as an intermediary between signal lines to block electrical cross-talk. The shield layer acts as a mediator that intercepts and redirects electromagnetic fields, preventing coupling between adjacent circuit elements while maintaining high pixel density for high resolution display.
2Illumination intensity
If high voltage signals are used to form images in liquid crystal, then image brightness and contrast are improved, but electrical noise from cross-talk increases significantly
Solution Approach 1:
The ground shield layer serves as a protective intermediary between high voltage signal lines, blocking the propagation of electrical noise while allowing the high voltage signals to maintain sufficient brightness and contrast in the liquid crystal display.
Solution Approach 2:
The shield layer is positioned in advance between circuit elements to preemptively block electrical noise before it can couple into sensitive signal lines. This preliminary protective action prevents noise accumulation that would otherwise degrade image quality during high voltage operation.
3Area of stationary object
If spatial proximity between pixels and circuit elements is increased to reduce chip area, then device miniaturization is achieved, but electrical cross-talk between elements increases
Solution Approach 1:
The ground shield layer acts as a compact intermediary structure that fits within the limited chip area. By positioning the shield between circuit elements, it provides effective noise blocking without requiring additional lateral space, enabling high pixel density while maintaining electrical isolation.
Solution Approach 2:
Instead of increasing lateral spacing between circuit elements to reduce cross-talk, the solution moves to the vertical dimension by stacking the ground shield layer between signal lines. This three-dimensional arrangement provides noise isolation while maintaining tight packing in the planar direction, achieving miniaturization without sacrificing electrical isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses electrical noise, enhancing image quality by reducing cross-talk and stray light interference, thereby improving contrast and resolution in LCoS micro-display devices.
Implementation Method 1
a metal layer to block stray light
Implementation Method 2
shield portions located between the intersections of the bit lines and word lines, whereby cross-talk between the word lines and the bit lines is reduced by the shield portions
Data Source
AI summary
An LCoS chip is designed to suppress electrical noise due to cross-talk between electrical components of the chip and stray light entered into the chip. The LCoS chip includes a silicon substrate having an array of memory cells formed the substrate. The chip includes a first polycrystalline silicon layer that forms word lines and a metal layer that forms bit lines, wherein bit lines are directed orthogonal to the word lines. The chip also includes capacitor storages formed on second and third second polycrystalline silicon layers. The second polycrystalline layer is disposed over the first polycrystalline silicon layer and over regions of the substrate not covered by the word lines. The metal layer includes shields to reduce cross-talk between neighboring bit lines as well as between the bit lines and the capacitor storages. A third polycrystalline layer is configured to reduce cross-talk between the bit lines and the word lines.