LCP Dielectric Layers with Embedded Copper Traces for PCB Pitch Reduction

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Solution Overview

Problem

Traditional printed circuit board (PCB) technologies face challenges in achieving high-density, fine-line, and fine-pitch circuitry due to limitations in dielectric spacing, impedance control, and reliability issues such as delamination and circuit embossing, especially when trying to create multi-layer constructions with small feature sizes and precise geometry.

Innovation Solution

The method involves using liquid crystal polymer (LCP) as a dielectric material with a combination of additive and subtractive processes, including laser ablation and electroplating, to create circuit-bearing dielectric layers that reduce effective dielectric spacing and allow for finer circuit traces and increased density, while also addressing issues of circuit embossing and impedance matching by embedding copper traces within the dielectric layers and utilizing both sides of the dielectric for circuit patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional PCB fabrication methods are used to create fine-line, high-density circuitry, then manufacturing simplicity is maintained, but manufacturing precision deteriorates due to limitations in dielectric spacing control and impedance matching

Engineering Contradiction:
Improvecircuit pitchVSAvoidfabrication process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The dielectric layers are pre-formed with circuit patterns embedded within them before lamination. This preliminary action allows precise control of dielectric spacing and impedance characteristics before the actual PCB assembly, enabling fine-line, high-density circuitry without compromising manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Circuit patterns are nested within the dielectric layers themselves, with copper traces embedded in recesses of the dielectric material. This nesting approach allows multiple circuit layers to be closely spaced while maintaining precise impedance control and avoiding traditional lamination issues

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If dielectric spacing is reduced to achieve higher circuit density, then circuit pitch is improved, but reliability deteriorates due to delamination and circuit embossing

Engineering Contradiction:
Improvecircuit densityVSAvoidstructural integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Circuit traces are nested within recesses of the dielectric layers, with copper disposed in the recesses to form embedded traces. This nesting eliminates the need for traditional lamination that causes delamination and embossing, allowing reduced dielectric spacing while maintaining structural integrity and reliability

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The dielectric structure is segmented into multiple layers with embedded circuits, where each layer is independently formed with precise dielectric spacing. This segmentation allows high circuit density while maintaining reliability by avoiding the structural stresses that cause delamination in traditional laminated constructions

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If conventional lamination processes are used for multi-layer constructions, then ease of manufacture is maintained, but manufacturing precision deteriorates due to inability to control dielectric spacing and impedance

Engineering Contradiction:
Improveimpedance controlVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

Dielectric layers with embedded circuit patterns are pre-formed using additive and subtractive processes before final assembly. This preliminary formation of dielectric layers with precise thickness and embedded circuits enables accurate impedance control while simplifying the overall manufacturing process by eliminating post-lamination adjustments

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Traditional mechanical lamination processes are replaced with additive and subtractive manufacturing processes that directly form dielectric layers with embedded circuits. This substitution enables precise control of dielectric spacing and impedance characteristics while maintaining ease of manufacture through automated processes

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of high-density, high-performance multi-layer circuits with improved reliability and precision impedance control, allowing for smaller trace widths and spaces while maintaining target impedance, thus overcoming the limitations of conventional PCB fabrication methods.

Implementation Method 1

Laser ablating is also performed to form recesses in the layer of LCP at the certain locations

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 2

Chemical etching is performed to remove the second copper layer that is exposed by the resist, thereby exposing the layer of LCP at certain locations

Methodology Applied
Scientific EffectChemical etching:

Data Source

PatentUS20240196542A1Electrical interconnect structure with circuit bearing dielectric layers and resultant dielectric spacing control and circuit pitch reduction
Publication Date: 2024.06.13 LCP MEDICAL TECHNOLOGIES LLC
  • US20240196542A1 patent drawing
  • US20240196542A1 patent drawing
  • US20240196542A1 patent drawing

AI summary

Embodiments for a method of fabricating a printed circuit board are disclosed. A layer of liquid crystal polymer (LCP) having a first layer of copper on a first side thereof and a second layer of copper on a second side thereof is provided. The second layer of copper is 5 microns or less thick. The method includes disposing a resist overtop of the second copper layer and masking the resist to expose the second copper layer at circuit trace locations. Chemical etching is performed to remove the second copper layer that is exposed by the resist, thereby exposing the layer of LCP at certain locations. Laser ablating is also performed to form recesses in the layer of LCP at the certain locations. Copper is disposed in the recesses to form traces that are at least partially embedded in the layer of LCP.