LCPLL Calibration Circuit for Continuous Frequency Locking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Phase locked loops (PLLs) with discrete frequency calibration points experience significant variations in gain and frequency coverage due to process and voltage variations, leading to dead frequency zones where locking fails, and high Kvco values degrade noise/jitter performance.
Innovation Solution
An inductor-capacitor phase locked loop (LCPLL) with a calibration circuit that continuously adjusts the coarse tune signal Vcal to eliminate dead frequency zones and improve noise performance by using a calibration circuit with comparators and variable resistors to adjust the pivot point of the output frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If discrete frequency calibration points are used in PLL, then the PLL structure is simple, but dead frequency zones appear where locking fails due to process and voltage variations
Solution Approach 1:
The patent transforms the static discrete calibration points into a dynamic continuous calibration mechanism. The calibration circuit continuously adjusts the VCO frequency by applying calibration currents based on detected frequency errors, enabling the system to adapt to process and voltage variations in real-time and eliminate dead frequency zones.
Solution Approach 2:
The patent changes the calibration parameter from discrete frequency points to continuous current adjustment. By varying the calibration current continuously based on the frequency error signal, the system achieves continuous frequency coverage and maintains reliable locking across all operating conditions.
2Adaptability or versatility
If high Kvco is used in VCO, then frequency tuning range is improved, but input clock jitter is passed through and noise performance degrades
Solution Approach 1:
The patent segments the frequency control into two independent parts: a coarse tuning component that provides wide frequency coverage and a fine calibration component that suppresses noise and jitter. The calibration circuit handles small frequency adjustments with high precision while the main VCO handles broad tuning, preventing jitter amplification.
Solution Approach 2:
The calibration circuit acts as an intermediary between the reference clock and the VCO output. It detects frequency errors and applies corrective calibration currents to the VCO, mediating the relationship between input clock and output frequency to suppress jitter transmission while maintaining tuning range.
Data Source
AI summary
An inductor-capacitor phase locked loop (LCPLL) includes an inductor-capacitor voltage controlled oscillator (LCVCO) that provides an output frequency. A calibration circuit includes two comparators and provides a coarse tune signal to the LCVCO. The two comparators respectively compare the loop filter signal with a first reference voltage and a second reference voltage that is higher than the first reference voltage to supply a first and second comparator output, respectively. The calibration circuit is capable of adjusting the coarse tune signal continuously in voltage values and adjusts the coarse tune signal based on the two comparator outputs. A loop filter provides a loop filter signal to the calibration circuit and a fine tune signal to the LCVCO. A coarse tune frequency range is greater than a fine tune frequency range.