LDMOS Trench Gate Air Gap for Lower Parasitic Capacitance

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Solution Overview

Problem

High-voltage integrated circuits, such as those used in microwave/radiofrequency power amplifiers, require specialized device structures to handle higher voltages effectively, and existing laterally-diffused metal-oxide-semiconductor devices face a tradeoff between breakdown voltage and specific on-resistance and gate charge performance.

Innovation Solution

A laterally-diffused metal-oxide-semiconductor device structure is developed, featuring a semiconductor substrate with a trench, source, and drain, along with a dielectric layer and gate, where an air gap is introduced below the gate and laterally between the trench sidewalls, reducing parasitic capacitance without compromising other electrical parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an extended drain structure is used to increase breakdown voltage, then voltage handling capability is improved, but parasitic capacitance increases which degrades high-frequency performance

Engineering Contradiction:
Improvebreakdown voltage handling capabilityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces an air gap (a porous/void structure) within the dielectric layer of the extended drain region. This air gap reduces the effective dielectric constant in the parasitic capacitance path, thereby lowering parasitic capacitance while maintaining the extended drain's voltage handling capability. The air gap acts as a low-permittivity material that disrupts the capacitance coupling without compromising the structural integrity or breakdown voltage of the extended drain.

Inventive Principle:
Principle #31Porous materials

2Use of energy by moving object

If the dielectric layer is made thicker to reduce parasitic capacitance, then high-frequency performance is improved, but device area increases which reduces integration density

Engineering Contradiction:
Improveparasitic capacitanceVSAvoiddevice area
Core Design Contradiction:
Use of energy by moving objectVSArea of stationary object

Solution Approach 1:

The patent applies the air gap structure locally within the dielectric layer of the extended drain region, rather than increasing the thickness of the entire dielectric layer. This localized modification reduces parasitic capacitance specifically in the high-stress region where it matters most, without increasing the overall device footprint. The air gap is positioned strategically to maximize capacitance reduction while minimizing area impact.

Inventive Principle:
Principle #3Local quality

3Reliability

If the extended drain structure is optimized for voltage handling, then breakdown voltage is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The air gap is nested within the existing dielectric layer structure of the extended drain. Rather than adding a separate complex structure, the air gap is formed as a void or low-permittivity region embedded within the dielectric material that already exists in the extended drain region. This nesting approach integrates the capacitance-reduction function into the existing voltage-handling structure without requiring additional processing steps or complex multi-layer configurations.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The air gap reduces parasitic capacitance, enhancing the device's performance by improving breakdown voltage handling capabilities while maintaining threshold voltage integrity.

Implementation Method 1

The air gap reduces parasitic capacitance, enhancing the device's performance by improving breakdown voltage handling capabilities while maintaining threshold voltage integrity.

Methodology Applied
Scientific EffectParasitic capacitance reduction: Capacitance

Data Source

PatentUS12191351B1Laterally-diffused metal-oxide-semiconductor devices with an air gap
Publication Date: 2025.01.07 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US12191351B1 patent drawing
  • US12191351B1 patent drawing
  • US12191351B1 patent drawing

AI summary

Structures for a laterally-diffused metal-oxide-semiconductor device and methods of forming same. The structure comprises a semiconductor substrate including a trench, a source and a drain in the semiconductor substrate, a dielectric layer inside the trench, and a gate in the dielectric layer. The trench has a first sidewall and a second sidewall, the source is adjacent to the first sidewall of the trench, the drain is adjacent to the second sidewall of the trench, and the gate is laterally between the first sidewall of the trench and the second sidewall of the trench. The structure further comprises an air gap in the dielectric layer. The air gap is below the gate, and the air gap is laterally between the first sidewall of the trench and the second sidewall of the trench.