LDMOS Amplifier Gate Voltage Limiting for Reliability

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Solution Overview

Problem

High-frequency LDMOS transistors used in amplifiers for plasma excitation often fail or have a shorter service life when operated in classes other than AB, due to exceeding manufacturer specifications for gate voltage, leading to thermal issues and reduced efficiency.

Innovation Solution

The design includes two LDMOS transistors connected to a ground point, with a power transformer and signal transformer configuration, and voltage-limiters to prevent excessive gate voltage, reducing thermal loading and increasing conduction angle, using diodes and resistors in series to manage peak voltages and improve efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If LDMOS transistors are driven fully in amplifier classes other than AB, then output power and efficiency are improved, but gate voltage specifications are exceeded leading to transistor failure and reduced service life

Engineering Contradiction:
Improveoutput powerVSAvoidtransistor service life
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies parameter changes by modifying the gate voltage characteristics through voltage-limiters. The voltage-limiters clip the negative peaks of the gate drive signal, transforming the voltage waveform to prevent exceeding maximum gate voltage specifications while maintaining sufficient positive drive voltage for full transistor conduction in class E or class F amplifiers. This allows the transistors to operate at higher power levels without failure.

Inventive Principle:
Principle #35Parameter changes

2Duration of action of moving object

If gate voltage is increased to drive transistors fully, then conduction angle is increased, but voltage limits are exceeded causing transistor failure

Engineering Contradiction:
Improveconduction angleVSAvoidtransistor reliability
Core Design Contradiction:
Duration of action of moving objectVSReliability

Solution Approach 1:

The voltage-limiters change the voltage waveform parameters by clipping negative peaks, which extends the effective conduction angle during the positive half-cycle without increasing peak gate voltage beyond specifications. This allows longer conduction duration while maintaining voltage limits.

Inventive Principle:
Principle #35Parameter changes

3Power

If driving power is increased to actuate LDMOS transistors, then output power is improved, but thermal loading increases leading to reduced efficiency and potential failure

Engineering Contradiction:
Improvedriving powerVSAvoidthermal loading
Core Design Contradiction:
PowerVSTemperature

Solution Approach 1:

The voltage-limiters convert the potentially harmful excessive negative voltage peaks into beneficial clipped waveforms that reduce reverse bias stress on the transistors. By removing the harmful negative excursions, the system achieves better thermal performance and efficiency without sacrificing output power capability.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

4Reliability

If voltage-limiters are added to limit gate voltage, then transistor reliability is improved, but device complexity increases

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidamplifier circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The voltage-limiters act as intermediary components between the signal transformer and the transistor gates. These simple diode-based circuits mediate the voltage waveform to protect the transistors without requiring complex control circuits or multiple active components, thus adding minimal complexity while significantly improving reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows full driving of LDMOS transistors without exceeding gate voltage limits, reducing the risk of failure, increasing service life, and enhancing thermal dissipation, while lowering driving power requirements and improving efficiency by extending the conduction angle and managing peak voltages effectively.

Implementation Method 1

Each gate terminal is connected to ground by at least one voltage-limiter. Therefore, the negative peak of a driving signal, which comes from the secondary winding of the signal transformer, receives the ground potential. Therefore, the negative voltage is limited to the voltage drop at the voltage-limiter

Methodology Applied
Scientific EffectVoltage limiting:

Implementation Method 2

Because of the connection of the two LDMOS transistors to the cooling plate, thermal loading of the LDMOS transistors can also be reduced. The ground connection point can be configured to transfer heat from the LDMOS transistors to the cooling plate. Accordingly, an even better dissipation of heat from the LDMOS transistors is ensured

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10714313B2High frequency amplifier apparatuses
Publication Date: 2020.07.14 TRUMPF PATENTABTEILUNG
  • US10714313B2 patent drawing
  • US10714313B2 patent drawing

AI summary

The invention relates to high-frequency amplifier apparatuses suitable for generating power outputs of at least 1 kW at frequencies of at least 2 MHz. The apparatuses include two LDMOS transistors each connected by their source connection to ground. The transistors can have the same design and can be arranged in an assembly (package). The apparatus also includes a circuit board lying flat against a metallic cooling plate and connected to the cooling plate, which can be connected to ground, and the assembly is arranged on or against the circuit board. The apparatuses have a power transformer, whose primary winding is connected to the drain connections of the transistors, and a signal transmitter. A secondary winding of the signal transmitter is connected to the gate connections of the two transistors. Each of the gate connections is connected to ground via at least one voltage-limiting structural element.