LDMOS Backgate STI for Reverse Recovery Charge Removal
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Solution Overview
Problem
In power Field Effect Transistors (FETs), particularly Laterally Diffused Metal Oxide Semiconductor (LDMOS) devices, the resistance of metal and parasitic NPN base region leads to inefficient power switching due to slow diffusion of minority carriers, resulting in high reverse recovery charge (Qrr) and energy loss during switching operations.
Innovation Solution
The implementation of Shallow Trench Isolation (STI) structures in the backgate region of LDMOS devices, combined with extended contacts and metal-semiconductor contacts, creates a minority carrier recombination site, reducing the diffusion time of Qrr and improving switching efficiency by selectively reducing active region density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a large volume of p-type materials is used in the power FET body region, then the blocking voltage capability is improved, but the reverse recovery charge (Qrr) increases and switching efficiency deteriorates
Solution Approach 1:
The patent divides the p-type body region into multiple segments by introducing isolated p-type regions (p-islands) within the n-type drift region. These p-islands are separated by n-type regions, creating a segmented structure that reduces the continuous p-type base width. This segmentation allows the device to maintain high blocking voltage capability while reducing the volume of continuous p-type material, thereby decreasing reverse recovery charge and improving switching efficiency.
Solution Approach 2:
The patent applies local quality by creating regions with different doping characteristics within the drift region. Specifically, p-type islands are locally introduced into the n-type drift region, creating localized p-n-p structures that provide hole injection and reduce minority carrier storage in specific areas. This local modification allows the bulk of the drift region to maintain its high-voltage blocking capability while localized regions handle carrier management, reducing overall Qrr.
2Power
If the base region width is increased to reduce on-resistance, then the current carrying capacity is improved, but the minority carrier diffusion time increases significantly
Solution Approach 1:
The patent segments the base channel region by introducing p-type islands that are separated by n-type regions. This segmentation creates multiple shorter base paths for carrier transport rather than one long continuous base. The effective base width for minority carrier diffusion is reduced because carriers can recombine at the p-n junctions of the segmented structure, significantly reducing diffusion time while maintaining current carrying capacity through the segmented parallel paths.
Solution Approach 2:
The patent introduces n-type regions as intermediary structures between p-type regions in the drift zone. These n-type intermediaries act as barriers that block minority carrier diffusion across the drift region, effectively reducing the diffusion path length. The n-type regions serve as recombination zones that intercept minority carriers, reducing the time they spend diffusing through the base region while allowing majority carrier current to flow through the p-type regions.
3Reliability
If active regions are isolated by isolation structures to prevent cross-talk, then device array reliability is improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent makes the p-type islands serve multiple functions: they act as both active device regions (providing hole injection and forming part of the conduction path) and as isolation structures (segmenting the drift region and preventing lateral carrier diffusion between adjacent devices). This multi-functionality eliminates the need for separate isolation structures, reducing device complexity and manufacturing steps while maintaining reliability by preventing cross-talk between device arrays.
Solution Approach 2:
The patent merges the function of active regions with the function of isolation structures. The p-type islands that are essential for device operation are simultaneously used to segment and isolate adjacent device regions. By combining these two functions into a single structural element, the patent reduces the number of separate components and manufacturing steps required, thereby reducing device complexity and cost while maintaining the reliability benefits of isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly minimizes reverse recovery charge flow by at least 25% and enhances diffusion current efficiency, reducing switching energy loss and improving high-frequency performance in power circuits.
Implementation Method 1
creates a minority carrier recombination site, reducing the diffusion time of Qrr
Data Source
AI summary
A system and method for a Laterally Diffused Metal Oxide Semiconductor (LDMOS) with Shallow Trench Isolation (STI) in the backgate region of FET with trench contacts is provided. The backgate diffusion region of the FET is split in the middle of the source-backgate side of the LDMOS with a strip of STI. A contact can be drawn across STI strip. The contact etch can be etched through the STI fill. The contact barrier material and trench fill processes can create a metal-semiconductor contact in the outline of the STI.