LDMOS Body Region Doping for Punch-Through Voltage
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Solution Overview
Problem
LDMOS devices face challenges in achieving high punch-through breakdown voltage while maintaining low on-resistance and small cell pitch, as conventional methods either lead to leakage or require high thermal budgets that affect other junction profiles.
Innovation Solution
The method involves forming a body region using a combination of tilt and zero tilt body implantations without conventional lateral diffusion, which allows for a short channel and high punch-through voltage without consuming the source region and minimizing thermal budget impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If short channel is used to reduce on-resistance and cell pitch, then on-resistance decreases and cell pitch reduces, but punch-through breakdown voltage decreases
Solution Approach 1:
The patent applies different implantation angles (tilt and zero-tilt) to create non-uniform doping distribution within the body region. The tilt implantation creates a gradient that peaks beneath the source region rather than at the surface, providing localized high doping concentration where needed to enhance punch-through breakdown voltage while maintaining the short channel structure for low on-resistance.
2Reliability
If shallower source junction is used to increase punch-through breakdown voltage, then punch-through breakdown voltage increases, but leakage increases due to silicide formation consuming source region
Solution Approach 1:
The patent transitions from conventional vertical doping profiles to a three-dimensional doping distribution by using tilt implantation. This creates a lateral gradient in the body region doping concentration, with the peak positioned beneath the source region. This dimensional change allows the doping profile to extend laterally and vertically, providing enhanced punch-through breakdown voltage without requiring a shallower source junction that would be vulnerable to silicide consumption.
3Reliability
If conventional body formation with high thermal budget is used to achieve high punch-through breakdown voltage, then punch-through breakdown voltage increases, but other junction profiles are affected and cell pitch increases
Solution Approach 1:
The patent replaces the thermal diffusion process (conventional body formation requiring high thermal budget) with ion implantation (tilt and zero-tilt body implantation). This substitution allows precise control of doping profiles through ion bombardment rather than thermal diffusion, achieving the desired body region doping without the high thermal budget that would otherwise affect CMOS devices and bipolar transistors in BCD processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in an LDMOS device with robustness and higher punch-through voltage, maintaining low body resistance and avoiding the limitations of conventional methods, such as leakage and thermal budget issues.
Implementation Method 1
performing tilt body implantation by implanting dopants of a first conductivity type in the semiconductor substrate using a mask, wherein the tilt body implantation is implanted at an angle from a vertical direction
Implementation Method 2
performing zero tilt body implantation by implanting dopants of the first conductivity type using the same mask, wherein the zero tilt body implantation is implanted with zero tilt from the vertical direction
Implementation Method 3
performing a rapid thermal annealing process and forming a short channel of the LDMOS device
Data Source
AI summary
A method of fabricating an LDMOS device includes: forming a gate of the LDMOS device on a semiconductor substrate; performing tilt body implantation by implanting dopants of a first conductivity type in the semiconductor substrate using a mask, wherein the tilt body implantation is implanted at an angle from a vertical direction; performing zero tilt body implantation by implanting dopants of the first conductivity type using the same mask, wherein the zero tilt body implantation is implanted with zero tilt from the vertical direction, and wherein the tilt body implantation and the zero tilt body implantation are configured to form a body region of the LDMOS device; and forming a source region and a drain contact region of the LDMOS device, wherein the source region and the drain contact region are of a second conductivity type.