LDMOS Body Region Width Reduction via Gate Mask Extraction
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Solution Overview
Problem
The miniaturization of LDMOS devices is limited by the requirement for a minimum predetermined width of the body region and the specific on-resistance characteristics are not optimally improved due to the need for a photoresist mask with a specific width between adjacent gate electrodes, which restricts the formation of a narrow heavily doped region and necessitates a separate process for the N+ source region.
Innovation Solution
The solution involves forming a high voltage semiconductor device where the width of the body region is reduced by omitting the need for a photoresist mask between adjacent gate electrodes and not forming a spacer on the sidewall of the gate electrode adjacent to the source region, allowing for a lightly doped source region to be defined using the same photoresist mask as the body region, thereby simplifying the manufacturing process and improving specific on-resistance characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a photoresist mask is formed in the space between adjacent gate electrodes to define a heavily doped region, then the heavily doped region can be formed with stable dimensions, but the body region width must be increased to accommodate the mask width, limiting device miniaturization
Solution Approach 1:
The invention extracts the photoresist mask formation step from the process of defining the heavily doped region. Instead of forming a separate mask in the space between gates, the body region is defined by etching the gate electrode structure itself, and the heavily doped region is formed by ion implantation through the gate structure without requiring an additional mask layer in the inter-gate space.
Solution Approach 2:
The gate electrode structure serves multiple functions: it acts as both the functional gate and as the defining structure for the body region and heavily doped region boundaries. The same gate structure that controls device operation also defines the geometric boundaries for doping regions, eliminating the need for separate masking structures.
2Manufacturing precision
If a separate process is added to form an N+ source region, then the source region can be formed with precise doping characteristics, but the manufacturing process complexity and cost increase
Solution Approach 1:
The invention merges the source region formation process with the body region definition process. A single ion implantation step forms both the body region and the N+ source region simultaneously by implanting through different thicknesses of the gate structure, eliminating the need for separate mask formation and doping steps.
Solution Approach 2:
The gate structure itself serves as the masking structure for forming both the body and source regions. The varying thickness of the gate structure automatically defines the doping profiles without requiring external mask structures, allowing the structure to define its own doping regions through self-aligned processes.
Data Source
AI summary
Disclosed is a high voltage semiconductor device and a method of manufacturing the same.


