LDMOS Device Breakdown Voltage via Self-Aligned Implant
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Solution Overview
Problem
Conventional 5V switching LDMOS devices have limitations in achieving high breakdown voltage (≥15 V) and miniaturization due to constraints in ion implantation energy and well region surface concentration, leading to large device sizes and high square resistance.
Innovation Solution
The manufacturing process involves forming a switching LDMOS device with a gate structure on a semiconductor substrate, using self-aligned ion implantation to increase ion implantation energy and dose, allowing for deeper junctions and higher surface concentration, thereby enhancing breakdown voltage and reducing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If ion implantation energy is increased to deepen junction depth for higher breakdown voltage, then breakdown voltage improves, but ions penetrate through polysilicon causing process failure
Solution Approach 1:
The patent removes the polysilicon layer that was previously used as a mask during ion implantation. By extracting this limiting component, the implantation process can proceed without the polysilicon barrier that prevented high energy implantation and deep junction formation, thereby enabling higher breakdown voltages while maintaining process reliability
Solution Approach 2:
The patent performs preliminary actions by forming the well region and LDD region through separate ion implantation steps before gate formation. This preliminary structuring allows subsequent high energy ion implantation to create deep junctions without requiring high energy during the LDD formation step, resolving the contradiction between achieving deep junctions and preventing polysilicon penetration
2Strength
If channel length is increased to ensure breakdown voltage with low well region surface concentration, then breakdown voltage improves, but device size increases
Solution Approach 1:
The patent changes the surface concentration parameter of the well region to a relatively high value through optimized ion implantation. This parameter change allows the device to achieve the required breakdown voltage with a shorter channel length, thereby reducing overall device size while maintaining electrical performance
Solution Approach 2:
The patent applies excessive doping action by implementing a heavily doped well region with high surface concentration. This excessive doping ensures that the breakdown voltage requirement is met with sufficient margin, allowing for channel length reduction and device miniaturization without compromising electrical performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the breakdown voltage and reduces the device size by optimizing the electric field distribution and surface concentration, addressing the limitations of conventional processes.
Implementation Method 1
a gate structure of the switching LDMOS device is formed on the surface of the substrate between the LDD region and the body doped region of the second conductivity type; a channel of the switching LDMOS device is formed in a surface layer of the semiconductor substrate between the LDD region and the body doped region and below the gate structure
Implementation Method 2
a layer of polysilicon is deposited, a gate structure is formed by means of etching, an LDD region is formed in the active region by means of ion implantation
Data Source
AI summary
A switching LDMOS device is formed first well in a semiconductor substrate that includes an LDD region and a first body doped region; a first heavily doped region serving as a source region is provided in the LDD region, and a second heavily doped region serving as a drain region is provided in the first body doped region; a channel of the switching LDMOS device is formed at a surface layer of the semiconductor substrate between the LDD region and the body doped region and below the gate structure; and one side of the LDD region and one side of the body doped region which are away from the gate structure both are provided with a field oxide or STI, and one side of the field oxide or STI is in contact with the first heavily doped region or the second heavily doped region.