LDMOS Buried Diffusion Extension for Surge Voltage

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Solution Overview

Problem

LDMOS transistors face a decrease in withstanding voltage along the W direction, leading to poor surge tolerance and an unfavorable trade-off between on-resistance and withstanding voltage, due to concentrated electric fields and reduced effectiveness of the buried diffusion region in relaxing electric fields.

Innovation Solution

The buried diffusion region of the first conductive type is extended farther than the gate electrode along a cross-section perpendicular to the source-drain direction, effectively relaxing electric field concentration and enhancing withstanding voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the buried diffusion region is extended farther than the gate electrode along the W direction, then the withstanding voltage is improved and electric field concentration is relaxed, but the device complexity increases

Engineering Contradiction:
Improvewithstanding voltageVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extends the buried diffusion region in the W direction (perpendicular to source-drain direction) beyond the gate electrode edges, utilizing the width dimension to relax electric field concentration. This dimensional extension allows the electric field to be distributed over a larger area, preventing breakdown and improving withstanding voltage without requiring changes to the basic device structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the buried diffusion region is extended farther than the gate electrode, then resistance to overvoltage and overcurrent surges is enhanced, but the manufacturing precision requirements increase

Engineering Contradiction:
Improveresistance to overvoltage and overcurrent surgesVSAvoidmanufacturing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The buried diffusion region is formed in advance during the manufacturing process to extend beyond where the gate electrode will be positioned. This preliminary extension ensures that when the device operates under surge conditions, the electric field is already relaxed and distributed, providing inherent protection against overvoltage and overcurrent without requiring additional protective structures or post-processing steps.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly improves withstanding voltage and maintains a favorable trade-off between on-resistance and withstanding voltage, while also enhancing resistance to overvoltage and overcurrent surges.

Implementation Method 1

the buried diffusion region of the first conductive type extends away from the body region farther than the gate electrode is, along a cross section perpendicular to a source-drain direction

Methodology Applied
Scientific EffectElectric field relaxation: Electric Field

Data Source

PatentUS8143691B2Semiconductor device and method for making the same
Publication Date: 2012.03.27 SHARP FUKUYAMA LASER CO LTD
  • US8143691B2 patent drawing
  • US8143691B2 patent drawing
  • US8143691B2 patent drawing

AI summary

To provide a semiconductor device and a method of making the same, the device being capable of preventing decrease in the withstanding voltage along the direction perpendicular to the source-drain direction and thereby improving the resistance to an overvoltage (overcurrent), the device includes: a p-type semiconductor substrate 201; an n-type diffusion region 202; a p-type body region 206, a p-type buried diffusion region 204, and an n-type drift region 207 within the n-type diffusion region 202; an n-type source region 208 and a p-type body contact region 209 within the p-type body region 206; an n-type drain region 210 within the n-type drift region 207; a gate insulating film above the p-type body region 206; and a gate electrode 211 above the gate insulating film, where the region 204 extends away from the region 206 farther than the farther edge of the gate electrode 211 is along a cross section perpendicular to the source-drain direction.