Raised LDMOS Drain Extension Doping for Lower Gate Leakage

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Solution Overview

Problem

In high voltage lateral drift MOS (LDMOS) devices, the raised source and drain regions can create a high electric field between the drain-side edge of the gate and the drain extension region, leading to high gate-drain leakage currents and a risk of gate oxide breakdown.

Innovation Solution

The semiconductor device incorporates a lightly doped epitaxial layer between the gate structure and the dummy gate structure, with a doping level in the range of 10^17 to 10^18 cm^-3, which reduces the electric field and minimizes gate-drain leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If raised source and drain regions are formed using an epitaxial layer, then channel mobility is improved and source-drain resistance is reduced, but a high electric field is created between the drain-side edge of the gate and the drain extension region, causing high gate-drain leakage currents and potential gate oxide breakdown

Engineering Contradiction:
Improvechannel mobility and source-drain resistanceVSAvoidgate-drain leakage current and gate oxide breakdown risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating a lightly doped region (with doping level of 10^17 to 10^18 atoms/cm³) specifically in the epitaxial layer between the gate structure and dummy gate structure. This localized doping modification reduces the electric field concentration at the drain-side gate edge without affecting the heavily doped raised source and drain regions, thus maintaining low source-drain resistance while reducing gate-drain leakage current.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the doping parameter of the epitaxial layer in the specific region between the gate and dummy gate. By adjusting the doping level to 10^17 to 10^18 atoms/cm³ (lighter than the raised source/drain regions but heavier than the substrate), the electric field distribution is modified, reducing peak field strength at critical interfaces and thereby reducing gate-drain leakage without sacrificing channel performance.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If the doping level in the epitaxial layer between gate and dummy gate is increased, then gate-drain leakage is reduced, but source-drain resistance may increase

Engineering Contradiction:
Improvegate-drain leakage currentVSAvoidsource-drain resistance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent maintains local quality differentiation by keeping the raised source and drain regions heavily doped (maintaining low source-drain resistance) while applying lighter doping only to the epitaxial layer region between the gate and dummy gate (reducing gate-drain leakage). This spatially selective doping approach allows each region to have optimal doping levels for its specific function.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the doping structure into distinct regions: heavily doped raised source/drain regions for low resistance, lightly doped epitaxial region between gate and dummy gate for leakage control, and the channel region with appropriate doping for mobility. This segmentation allows independent optimization of each region's electrical characteristics without compromise.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces gate-drain leakage currents and enhances the robustness of the device against gate oxide breakdown, while maintaining the performance benefits of raised source and drain regions.

Implementation Method 1

the raised source and drain regions can create a high electric field between the drain-side edge of the gate and the drain extension region

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

forming the source and drain regions of the device using an epitaxial layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentEP3731281B1Lateral semiconductor device having raised source and drain, and method of manufacture thererof
Publication Date: 2025.02.19 NXP BV
  • EP3731281B1 patent drawingFigure 1~4
  • EP3731281B1 patent drawingFigure 2
  • EP3731281B1 patent drawingFigure 5a~5c

AI summary

A semiconductor device is disclosed, a substrate structure; a raised source region; a raised drain region; a separation region disposed laterally between the raised source region and the raised drain region; a gate structure, disposed between the raised source region and the raised drain region and above a part of the separation region, the gate structure being spaced apart from the drain region and defining a drain extension region therebetween; a dummy gate structure in the drain extension region; an epitaxial layer, disposed above and in contact with the substrate structure and forming the raised source region, the raised drain region, and a raised region between the gate structure and the dummy gate structure, wherein the raised region between the gate structure and the dummy gate structure is relatively lightly doped to a conductivity of a second conductivity type which is opposite the first conductivity type.