LDMOS Dummy Gate Biasing for Adjustable Breakdown Voltage
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Solution Overview
Problem
Current LDMOS transistors face challenges in adjusting breakdown voltage efficiently, limiting their flexibility in high-voltage applications due to fixed resistance characteristics.
Innovation Solution
The implementation of a dummy gate stack electrically coupled to a variable voltage allows for adjustable resistance in the LDMOS transistor, enabling flexible breakdown voltage settings by overlapping the active and dummy gate stacks with different regions of the transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate poly-silicon is extended to overlap with the drift region to maintain breakdown voltage, then the breakdown voltage is maintained, but the device loses flexibility in adjusting breakdown voltage and resistance
Solution Approach 1:
The gate structure is segmented into two independent parts: an active gate stack and a dummy gate stack. The active gate stack controls the channel and can be adjusted to modify breakdown voltage and resistance characteristics, while the dummy gate stack maintains the field plate function to ensure adequate breakdown voltage. This segmentation allows independent optimization of both reliability and adaptability.
Solution Approach 2:
The active gate stack is designed with adjustable dimensions (width, length, positioning) that can be dynamically modified during device design or operation. This dynamic adjustability enables the device to adapt breakdown voltage and resistance characteristics to different application requirements while the dummy gate stack provides stable breakdown voltage support.
2Productivity
If the LDMOS uses a short channel between drain and source to deliver more current per unit area, then the current density is improved, but the breakdown voltage becomes difficult to control
Solution Approach 1:
The dummy gate stack acts as an intermediary element between the active gate stack and the drift region. It provides field plate coverage over the drift region to enhance and stabilize the breakdown voltage, while allowing the active gate stack to maintain the short channel configuration for high current density. The intermediary dummy gate resolves the conflict between short channel benefits and breakdown voltage control.
Data Source
AI summary
A MOS transistor includes a substrate, a first region, a second region, a source region, a drain region, an active gate stack, and a dummy gate stack. The substrate has a first conductivity. The first region having the first conductivity is formed in the substrate. The second region having a second conductivity is formed in the substrate and is adjacent to the first region. The source region with the second conductivity is formed in the first region. The drain region with the second conductivity is formed in the second region. The active gate stack is disposed on the first region. The dummy gate stack is disposed on the second region, and the dummy gate stack is electrically coupled to a variable voltage.