LDMOS ESD Protection Trigger Voltage via Doped Region Spacing
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Solution Overview
Problem
Laterally-diffused metal-oxide-semiconductor (LDMOS) devices used in ESD protection circuits have a trigger voltage that is too low for high-voltage applications, such as automotive, making them inadequate for effectively handling electrostatic discharge events.
Innovation Solution
A structure for a laterally-diffused metal-oxide-semiconductor device is designed with specific source/drain regions, a gate electrode, and a doped region, where the doped region's side edge is laterally spaced from the contact, and the gate dielectric overlaps with trench isolation regions, enhancing the device's ability to handle high-voltage applications by adjusting the trigger and holding voltages through precise implantation conditions and interconnect structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional LDMOS device structure is used in ESD protection circuits, then the device can provide basic ESD protection functionality, but the trigger voltage is too low for high-voltage applications such as automotive
Solution Approach 1:
The patent introduces a specifically positioned doped region beneath the source/drain region that creates localized electrical characteristics. This local modification to the substrate structure enables the device to achieve higher trigger voltage in the critical high-voltage application zones while maintaining overall ESD protection functionality
Solution Approach 2:
The patent modifies the electrical parameters of the LDMOS device by introducing a doped region with specific doping concentration and depth. This changes the trigger voltage parameter from conventional low levels to higher levels suitable for automotive applications, while adjusting other parameters like holding voltage to maintain proper ESD protection operation
2Object-affected harmful factors
If the device structure is modified to increase trigger voltage for high-voltage applications, then the device becomes suitable for automotive applications, but the device footprint may increase
Solution Approach 1:
Instead of increasing device footprint in the lateral plane, the patent introduces a vertical dimension solution by doping the substrate at a specific depth beneath the source/drain region. This vertical modification achieves the required voltage characteristics without expanding the horizontal device area
Solution Approach 2:
The doped region is nested within the existing device structure, positioned beneath the source/drain region in the substrate. This nested configuration allows the voltage-enhancing feature to be integrated within the existing footprint rather than requiring additional lateral space
Data Source
AI summary
Structures for a laterally-diffused metal-oxide-semiconductor device and methods of forming a structure for a laterally-diffused metal-oxide-semiconductor device. First and second source/drain regions are formed in a substrate, a gate electrode is formed over the substrate, an interconnect structure over the substrate, and a doped region is arranged in the substrate beneath the first source/drain region. The gate electrode is laterally positioned between the first and second source/drain regions, and the interconnect structure includes a contact connected to the first source/drain region. The doped region has a side edge that is laterally spaced from the contact by a distance.