LDMOS FDSOI Structure for Voltage Management
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Solution Overview
Problem
Current semiconductor fabrication methods for integrated circuits face challenges in reducing operating voltages of auxiliary devices, which remain high despite advancements in core and Input/Output voltages, limiting the performance and capabilities of integrated circuits.
Innovation Solution
The development of a laterally diffused metal oxide semiconductor (LDMOS) with a fully depleted silicon on insulator (FDSOI) structure, incorporating multiple wells and epitaxial regions with specific doping and layer thicknesses to reduce driving voltages and enhance breakdown voltage, facilitating the fabrication of semiconductor devices with improved voltage management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional semiconductor fabrication methods are used for auxiliary devices, then core and I/O operating voltages can be reduced, but auxiliary device operating voltages remain high
Solution Approach 1:
The auxiliary device is segmented into multiple functional regions including a first region with first doping concentration and a second region with second doping concentration. This segmentation allows different parts of the device to operate at different voltage levels, enabling the auxiliary device to interface with both high-voltage and low-voltage circuits simultaneously.
Solution Approach 2:
Different regions of the semiconductor structure are assigned different doping concentrations and material compositions tailored to their specific functional requirements. The first region has properties optimized for high-voltage operation while the second region is optimized for low-voltage operation, allowing each local area to perform its designated function efficiently.
2Reliability
If auxiliary devices are designed for high voltage operation, then they can interface with high-voltage circuits, but they cannot efficiently interface with low-voltage integrated circuits
Solution Approach 1:
The auxiliary device structure is designed to perform multiple functions: it can operate as a high-voltage device when interfacing with high-voltage circuits and as a low-voltage device when interfacing with low-voltage integrated circuits. The multi-region structure with varying doping concentrations enables this universal functionality, allowing a single device to serve both high-voltage and low-voltage interface requirements.
3Ease of manufacture
If single-region semiconductor structures are used, then fabrication is simpler, but voltage management and breakdown voltage are limited
Solution Approach 1:
The semiconductor structure is prepared in advance with multiple regions having predetermined doping concentrations and thicknesses. The first region is formed with a first doping concentration and the second region with a second doping concentration before final device assembly. This preliminary structuring enables precise voltage management capabilities to be built into the device architecture itself, allowing for better voltage control and higher breakdown voltages.
Data Source
AI summary
A semiconductor device includes a first well that is disposed in a semiconductor substrate. The semiconductor device further includes a second well that is disposed in the semiconductor substrate. The semiconductor device further includes a source region, a drain region, and a gate structure between the source region and the drain region. The gate structure is disposed above the first well. The source region includes a first conducting contact above the first well and. The drain region includes a second conducting contact above the second well, the drain region being connected with the second well at least partially through a first epi region. The first epi region and the second well are configured to lower a first driving voltage applied on the source region and the drain region to a second voltage applied on the gate structure.