LDMOS Feed-Through Source-to-Substrate Contact

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Solution Overview

Problem

Conventional LDMOS transistor structures face challenges in minimizing switching losses and reducing the area and resistance of source-to-substrate contacts, which are crucial for high-frequency RF applications and compact device packaging.

Innovation Solution

The implementation of a feed-through source-to-substrate contact using tungsten feed-throughs, which are processed using chemical vapor deposition (CVD) titanium (Ti), Ti-nitride (TiN), and tungsten (W) plugs, allowing for reduced area and low resistance connections while isolating the gate shield from drain metallization, and utilizing heavily doped polysilicon for the gate shield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a budding contact from n+ source to p+ sinker is used for source-to-substrate connection, then the contact can be formed, but it consumes too much area and has high resistance

Engineering Contradiction:
Improvecontact resistanceVSAvoidcontact area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a lateral budding contact approach to a vertical feed-through contact approach. The n+ source contact extends vertically downward through the epitaxial layer to directly contact the p+ substrate, changing the contact geometry from lateral to vertical dimension, thereby reducing contact area while maintaining low resistance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts the contact formation process from the traditional budding contact method and implements a direct feed-through contact. By removing the intermediate budding structure and using direct vertical extension of the n+ source contact to the p+ substrate, the contact area is minimized while achieving low resistance connection

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If a trench is etched down to the substrate with sloped profile to avoid aluminum voiding, then the source can be connected to the substrate using silicide and aluminum metal, but the trench consumes too much area

Engineering Contradiction:
Improvecontact resistanceVSAvoidtrench area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent eliminates the need for wide sloped trenches by using vertical feed-through contacts. The n+ source contact extends vertically through the epitaxial layer to contact the p+ substrate directly, removing the requirement for large-area sloped trench structures and associated aluminum voiding concerns

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses the same n+ source contact structure for both source connection and substrate connection purposes. The feed-through contact serves dual functions: providing the source contact and simultaneously providing the substrate connection, eliminating the need for separate trench structures

Inventive Principle:
Principle #26Copying

3Reliability

If the cell pitch is reduced to obtain lower resistance, then the total resistance of the MOSFET decreases, but the contact area and complexity increase

Engineering Contradiction:
ImproveMOSFET resistanceVSAvoidcontact structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The n+ source contact structure serves multiple functions simultaneously: it provides the source contact, extends vertically to provide substrate connection, and eliminates the need for separate budding contacts or wide trenches. This multi-functionality reduces overall device complexity while enabling smaller cell pitch

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent segments the contact structure into distinct vertical regions: the n+ source contact region in the epitaxial layer and the p+ substrate contact region below. This segmentation allows for optimized doping profiles and contact dimensions in each region, enabling reduced cell pitch with controlled complexity

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the area and volume of contacts, increases cell density, and decreases manufacturing time and costs, enhancing the efficiency and compactness of LDMOS structures for use in mobile devices.

Implementation Method 1

An electrically conductive trench-like feed-through element passes through the intervening layer and contacts the substrate and the source to electrically connect the drain contact and the substrate layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

processed using chemical vapor deposition (CVD) titanium (Ti), Ti-nitride (TiN), and tungsten (W) plugs

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentEP2497114B1Semiconductor device
Publication Date: 2020.03.11 VISHAY SILICONIX LLC
  • EP2497114B1 patent drawingFigure 1
  • EP2497114B1 patent drawingFigure 2
  • EP2497114B1 patent drawingFigure 3

AI summary

An LDMOS (laterally diffused metal oxide semiconductor) structure connects the source to a substrate and also the gate shield while utilizing a reduced area for such contacts. The structure includes an electrically conductive substrate layer, a source, and a drain contact; the drain contact is separated from the substrate layer by at least one intervening layer. An electrically conductive trench-like feed-through element passes through the intervening layer and contacts the substrate and the source to electrically connect the drain contact and the substrate layer.