LDMOS Transistor with Ferroelectric STI for BV and Ron Tradeoff

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Solution Overview

Problem

Conventional LDMOS transistors face a tradeoff between high breakdown voltage (BV) and low on-resistance (Ron), with longer shallow trench isolation (STI) increasing BV but also increasing Ron, which is adverse to device miniaturization.

Innovation Solution

A new LDMOS transistor structure with a laminated STI structure in the drift zone, comprising alternate layers of insulating and ferroelectric materials, including hafnium oxide-based ferroelectric layers, which forms a capacitor structure between the gate and drain, reducing Ron when on and increasing BV when off, by leveraging stronger ferroelectric polarization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the length of the shallow trench isolation (STI) in the drift zone is increased to increase the breakdown voltage (BV), then the breakdown voltage is improved, but the on-resistance (Ron) increases rapidly

Engineering Contradiction:
Improvebreakdown voltageVSAvoidon-resistance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies composite materials by using a laminated structure in the STI region consisting of alternating insulating material layers and ferroelectric material layers. This composite structure combines the electrical isolation properties of insulating materials with the polarization effects of ferroelectric materials, enabling simultaneous achievement of high breakdown voltage and low on-resistance without simply increasing the STI length

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the physical and chemical parameters of the STI structure by introducing ferroelectric materials with specific polarization characteristics. The ferroelectric layers provide internal electric fields that modify the charge distribution in the drift zone, changing the electrical characteristics to achieve low on-resistance while maintaining high breakdown voltage through the unique properties of ferroelectric materials rather than geometric scaling

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Simultaneously enhances breakdown voltage and reduces on-resistance, achieving a better tradeoff between these critical device parameters.

Implementation Method 1

the laminated structure comprises a stack of alternate layers of insulating material and ferroelectric material... leveraging stronger ferroelectric polarization

Methodology Applied
Scientific EffectFerroelectric polarization:

Implementation Method 2

which forms a capacitor structure between the gate and drain... Simultaneously enhances breakdown voltage and reduces on-resistance

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11594631B2LDMOS transistor and manufacture thereof
Publication Date: 2023.02.28 SIEN (QINGDAO) INTEGRATED CIRCUITS CO LTD
  • US11594631B2 patent drawing
  • US11594631B2 patent drawing
  • US11594631B2 patent drawing

AI summary

The present application provides a laterally diffused metal oxide semiconductor (LDMOS) transistor and a manufacturing method thereof. The transistor comprising: a semiconductor substrate having a doping region, wherein the doping region comprises a first well region and a second well region with opposite doping types; a source region, a drain region, a shallow trench isolation (STI) structure comprising a laminated structure having an alternate layers of insulating material and ferroelectric material, a gate, a contact hole, and a metal layer. The LDMOS transistor simultaneously increases breakdown voltage (BV) and reduces on-resistance (Ron).