LDMOS Field-Oxide Layout for Higher Breakdown Voltage

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Solution Overview

Problem

Lateral diffused MOS (LDMOS) transistors face limitations in breakdown voltage due to electric field peaks near the bird's beak of the field oxide, leading to device breakdown failures, as the deep n-well is not fully depleted, causing an imbalance in dopant concentrations that adversely affect the electric field.

Innovation Solution

A p-type doped region is introduced near the bird's beak of the field oxide, with a dopant concentration higher than the n-type dopant concentration in the deep n-well, to achieve charge balance and reduce the electric field peak, thereby enhancing the breakdown voltage by increasing the p-type dopant concentration near the source region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the deep n-well is not fully depleted to maintain dopant concentration balance, then the manufacturing process is simpler, but the electric field peak causes device breakdown failure

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddopant concentration distribution
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a p-type doped region specifically at the bird's beak area where the electric field peak occurs. This localized doping modifies only the critical region rather than the entire device structure, reducing the electric field peak and preventing breakdown while maintaining overall device functionality and relatively simple manufacturing processes.

Inventive Principle:
Principle #3Local quality

2Productivity

If the process node is shrunk to improve integration density, then the integration density increases, but new techniques are required to maintain transistor performance

Engineering Contradiction:
Improveintegration densityVSAvoidtransistor performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies parameter changes by modifying the dopant concentration distribution through selective p-type doping at the bird's beak region. This parameter modification addresses the performance degradation that occurs during process node scaling, allowing transistors to maintain their breakdown voltage and other performance characteristics even as the device dimensions are reduced to achieve higher integration density.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the p-type dopant concentration is increased near the source region, then the breakdown voltage is enhanced, but the device structure becomes more complex

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddoped region structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the p-type doped region as an intermediary element that mediates between the field oxide and the deep n-well. This intermediary doping layer manages the electric field distribution by creating a transition zone that reduces the electric field peak, thereby enhancing breakdown voltage while avoiding the need for fundamentally complex device structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach effectively improves the breakdown voltage of LDMOS transistors by reducing the electric field peak and preventing device breakdown, allowing for increased operational reliability and performance.

Implementation Method 1

doping a second impurity of a second conductivity type into the first-type deep well to form a second-type doped region

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

electric field peaks near the bird's beak of the field oxide

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS11824115B2Semiconductor device and manufacturing method thereof
Publication Date: 2023.11.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11824115B2 patent drawing
  • US11824115B2 patent drawing
  • US11824115B2 patent drawing

AI summary

A semiconductor device includes a semiconductor substrate, a deep n-well, a field oxide, a gate structure, a p-type doped region, a source region, and a drain region. The deep n-well is in the semiconductor substrate. The field oxide is partially embedded in the deep n-well and having a tip corner in a position substantially level with a top surface of the semiconductor substrate. The gate structure is on the field oxide and laterally extends past the tip corner of the field oxide. The p-type doped region is in the deep n-well and is interfaced with the tip corner of the field oxide. The source region and a drain region are laterally separated at least in part by the p-type doped region and the field oxide.