LDMOS Field Plate Layout for Breakdown Voltage and Low On-Resistance
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Solution Overview
Problem
Existing high voltage MOS transistor devices face challenges in achieving low on-resistance and high breakdown voltage simultaneously, while also dealing with electrostatic discharge (ESD) that affects overall performance.
Innovation Solution
A semiconductor device with a field plate having a rectangular frame or net shape, which disperses the electric field and improves electric field distribution, combined with a simple manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a conventional LDMOS structure is used, then the breakdown voltage is improved through low doping concentration and large lateral diffusion drift region, but the on-resistance remains high
Solution Approach 1:
The drift region is segmented into multiple zones with different doping concentrations (first drift region with lower doping concentration and second drift region with higher doping concentration), allowing optimization of both breakdown voltage and on-resistance through regional differentiation
Solution Approach 2:
Different regions of the device are assigned different doping concentrations and structural characteristics - the first drift region has lower doping for high breakdown voltage, while the second drift region has higher doping for lower on-resistance, achieving local optimization of conflicting requirements
2Strength
If the doping concentration is reduced to increase breakdown voltage, then the breakdown voltage is improved, but the on-resistance increases
Solution Approach 1:
The doping concentration parameter is varied spatially across different drift regions - lower doping concentration in the first drift region for high breakdown voltage, and higher doping concentration in the second drift region for low on-resistance, resolving the parameter trade-off
3Reliability
If a complex field plate structure is used to disperse electric field, then the ESD performance is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The field plate is segmented into multiple parts (first field plate and second field plate) positioned over different drift regions, with each segment having optimized dimensions and positions to dispers e the electric field effectively while maintaining manufacturing simplicity
Solution Approach 2:
Different field plate segments are designed with different characteristics (widths, positions, lengths) to match the local requirements of different drift regions, providing optimized ESD protection without uniform complexity throughout
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves reduced on-resistance and enhanced breakdown voltage, along with improved electrostatic discharge resistance and stable structure, while simplifying the manufacturing process.
Implementation Method 1
The semiconductor device with a filed plate, in particular to a lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor device with a field plate with a special shape... has the effect of dispersing electric field
Implementation Method 2
a first oxide layer located on a surface of the substrate... part of the gate electrode located on the first oxide layer... the field plate located on the first oxide layer
Data Source
AI summary
The invention provides a semiconductor device, which comprises a substrate, a first oxide layer located on a surface of the substrate, a gate electrode located on the substrate and partially contacting the substrate, and a field plate located on the first oxide layer, wherein the field plate has at least a rectangular frame shape when viewed from a top view.