LDMOS Field Plate Dielectric Stack for Under-Etch Prevention
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Solution Overview
Problem
The fabrication of LDMOS devices with field plates is complicated by design rules and costs, and the placement of field plates is restricted, leading to under-etching and silicide issues in subsequent manufacturing processes.
Innovation Solution
A multi-layered dielectric structure is formed to separate the field plates from the substrate, enhancing process flexibility and compatibility by reducing the thickness of the first dielectric layer and ensuring sufficient thickness of the second dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If field plates are placed close to the substrate, then device performance is improved, but under-etching and silicide blocking issues occur
Solution Approach 1:
A dielectric layer is introduced as an intermediary between the field plate and the substrate. This dielectric layer acts as a mediator that provides the necessary separation distance to prevent under-etching and silicide blocking issues while still allowing the field plate to influence the electrical characteristics of the device. The dielectric material serves as a buffer that resolves the conflict between close placement for performance and sufficient distance for manufacturing reliability.
2Reliability
If field plates are placed close to the substrate, then device performance is improved, but silicide blocking issues occur
Solution Approach 1:
The dielectric layer serves as a protective intermediary that prevents silicide blocking by maintaining adequate separation between the field plate and the substrate. This intermediary layer allows subsequent manufacturing processes, including silicide formation, to proceed without interference while preserving the electrical performance benefits of the field plate structure.
Solution Approach 2:
The structure is segmented into distinct layers: the field plate, the dielectric layer, and the substrate. This segmentation separates the functional elements that need to interact electrically from those that need physical separation for manufacturing purposes. The dielectric layer creates a clear boundary that enables independent optimization of electrical performance and manufacturing compatibility.
3Manufacturing precision
If design rules are strictly followed for field plate placement, then manufacturing issues are avoided, but process flexibility is reduced
Solution Approach 1:
The introduction of the dielectric layer changes the critical parameter from lateral placement distance to vertical thickness control. This parameter change provides design flexibility because the dielectric layer thickness can be independently controlled through deposition processes, allowing field plates to be placed in locations that would otherwise violate traditional design rules while still maintaining adequate separation for manufacturing reliability.
Data Source
AI summary
An LDMOS device includes a gate structure, a multi-layered dielectric structure and at least a conductive field plate. The gate structure is disposed over a substrate and between a source region and a drain region. The multi-layered dielectric structure is disposed over the gate structure. The multi-layered dielectric structure includes a first dielectric layer in contact with the gate structure, and a second dielectric layer over the first dielectric layer. A thickness of the second dielectric layer is equal to or greater than a thickness of the first dielectric layer. The conductive field plate is disposed over the multi-layered dielectric structure.