LDMOS Finger Source Enlarged End for Breakdown Voltage
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Solution Overview
Problem
Conventional LDMOS transistors face a decrease in breakdown voltage due to high electric field density at the finger-shaped source, which worsens with smaller device sizes, and widening the source to improve this reduces layout flexibility and hinders further scaling-down.
Innovation Solution
A semiconductor structure with a finger portion having an enlarged and curved end region, where only the end of the finger portion is widened, reducing surface electric field density and maintaining the original width of the trunk portion, thereby improving breakdown voltage and layout flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of the finger shaped source is widened to enlarge the curvature radius of the finger end, then breakdown voltage is improved, but layout flexibility is sacrificed
Solution Approach 1:
The patent applies local quality by differentiating the width of the finger-shaped source region along its length. The end portion has a larger width (w2) than the trunk portion (w1), creating local structural variation. This allows the curved end region to have a larger curvature radius for improved breakdown voltage, while the narrower trunk portion maintains layout flexibility and enables further device scaling.
2Productivity
If the device size is reduced, then productivity is improved, but electric field density increases causing decreased breakdown voltage
Solution Approach 1:
The patent changes the geometric parameters of the finger-shaped source region by implementing a width variation along its length. The end portion width (w2) is specifically increased compared to the trunk portion width (w1), which directly changes the curvature radius parameter at the finger end. This parameter modification reduces electric field density at the critical curved region, thereby improving breakdown voltage while maintaining the overall reduced device size for higher productivity.
Data Source
AI summary
The invention provides a semiconductor structure. A first type body doped region is deposited on a first type substrate. A first type heavily-doped region having a finger portion with an enlarged end region is deposited on the first type body doped region. A second type well region is deposited on the first type substrate. A second type heavily-doped region is deposited on the second type well region. An isolation structure is deposited between the first type heavily-doped region and the second type heavily-doped region. A gate structure is deposited on the first type substrate between the first type heavily-doped region and the isolation structure.


