LDMOS Gate Insulator Layout for Rsp-BV Tradeoff
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Solution Overview
Problem
LDMOS devices face a tradeoff between specific on-resistance (Rsp) and breakdown voltage (BV), where improving one parameter often adversely affects the other, hindering optimal performance.
Innovation Solution
The implementation of alternating insulating layers with different thicknesses between the gate and semiconductor layer, including interdigitated shallow trench isolation (STI) regions and step-dielectric layers, to manage the tradeoff between Rsp and BV.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the drain and source spacing is increased to increase breakdown voltage, then breakdown voltage is improved, but specific on-resistance increases
Solution Approach 1:
The patent applies local quality by implementing alternating insulating layers with different thicknesses (first insulating layer with thickness t1, second insulating layer with thickness t2 where t2 > t1) in specific regions between drain and source. This creates localized field management zones that allow high breakdown voltage in regions requiring it while maintaining lower resistance paths in other regions, thus resolving the contradiction between breakdown voltage and specific on-resistance.
Solution Approach 2:
The gate insulating layer is segmented into alternating first and second insulating layers with different thicknesses arranged in an interdigitated pattern. This segmentation allows different portions of the device to have optimized insulation characteristics - thicker layers for breakdown voltage enhancement and thinner layers for resistance reduction - simultaneously addressing both contradictory requirements.
2Reliability
If alternating insulating layers with different thicknesses are implemented, then specific on-resistance is reduced, but device complexity increases
Solution Approach 1:
The patent merges the gate insulating layer and field insulating layer into a unified alternating layer structure. The first and second insulating layers serve dual functions as both gate insulation and field management, eliminating the need for separate complex insulation systems while achieving both low resistance and high breakdown voltage performance.
Solution Approach 2:
The alternating insulating layers perform multiple functions simultaneously: they provide gate insulation, manage electric fields, control breakdown voltage, and reduce specific on-resistance. This multi-functionality reduces the need for additional separate structures, thereby managing device complexity while achieving superior electrical performance.
Data Source
AI summary
Semiconductor devices and fabrication methods thereof are described. For example, a semiconductor device includes a semiconductor layer, a drain region disposed in the semiconductor layer, a source region disposed in the semiconductor layer, a channel region disposed between the drain region and the source region, a gate disposed over the channel region, and first and second insulating layers disposed between the gate and the semiconductor layer. Sections of the first insulating layer and sections of the second insulating layer alternate along a first direction perpendicular to a second direction defined between the drain region and the source region, each of the sections of the first insulating layer having a first thickness and each of the sections of the second insulating layer having a second thickness greater than the first thickness.