LDMOS Gate and Segmented Source Layout for High-Voltage Reliability
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Solution Overview
Problem
High-voltage integrated circuits, such as power amplifiers, require specialized device technology to handle high voltages effectively, and existing laterally-diffused metal-oxide-semiconductor transistors need improved structures to enhance voltage-handling capabilities.
Innovation Solution
A structure for a laterally-diffused metal-oxide-semiconductor transistor is developed, comprising a semiconductor substrate with a drain, source, and shallow trench isolation region, where the gate surrounds the isolation region and drain, with specific doping and implantation techniques to optimize electrical and physical characteristics, and a method for forming this structure is provided.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the source is formed as a continuous region, then the manufacturing process is simpler, but current crowding at the drain edges increases and voltage-handling capability deteriorates
Solution Approach 1:
The source is divided into multiple disconnected source regions rather than forming a continuous source. This segmentation reduces current crowding at the drain edges by distributing the current flow across separate regions, thereby improving voltage-handling capability and reducing breakdown risks while maintaining manufacturing feasibility through selective doping processes
2Reliability
If the gate length is increased to improve voltage handling, then the voltage-handling capability is improved, but the device area increases
Solution Approach 1:
The gate structure is configured with specific local characteristics including a gate length that extends beyond the source region length, creating an overlap region. This local structural quality enhancement at critical areas (gate-source overlap) improves voltage handling and electric field distribution without requiring a proportional increase in overall device area, thus achieving better voltage capability with minimal area penalty
3Reliability
If the source region length is made equal to the gate length, then the electric field distribution is improved, but the source control over the channel is reduced
Solution Approach 1:
The gate structure extends in multiple dimensions relative to the source regions, with the gate length exceeding the source region length to create lateral overlap. This dimensional configuration improves electric field distribution and voltage handling by ensuring the gate controls the channel throughout the entire source region extent, while the gate's broader coverage in the lateral dimension maintains effective channel control despite the source-gate length relationship
Data Source
AI summary
Structures for a laterally-diffused metal-oxide-semiconductor device and methods of forming a structure for a laterally-diffused metal-oxide-semiconductor device. The structure comprises a drain and a source in a semiconductor substrate. The source includes a source region having a first terminating end, a second terminating end, and a length between the first terminating end and the second terminating end. The structure further comprises a shallow trench isolation region in the semiconductor substrate. The shallow trench isolation region surrounds the drain. The structure further comprises a gate that surrounds the shallow trench isolation region and the drain. The gate has a side section between the drain and the source region, the side section of the gate has a width, and the gate has a length in a direction transverse to the width. The length of the source region is substantially equal to the length of the gate.