LDMOS Gate Structure Extending Into Substrate for Breakdown Voltage
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Solution Overview
Problem
LDMOS devices face challenges in meeting both breakdown voltage and device performance requirements in high power applications, often necessitating compromises in these parameters.
Innovation Solution
A semiconductor device with a shallow trench isolation (STI) structure and a gate structure that extends into the semiconductor substrate, enhancing control over the channel and improving breakdown voltage while maintaining high device performance, achieved through specific manufacturing steps including ion implantation and recess formation in the STI structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDMOS is used in high power device applications, then device performance requirements may be met, but breakdown voltage requirements cannot be met
Solution Approach 1:
The device is segmented into distinct regions including a first doped region (N-type), second doped region (P-type), and third doped region (N-type) with different doping concentrations. This segmentation allows each region to be optimized independently for both breakdown voltage and device performance, resolving the contradiction between these two requirements.
Solution Approach 2:
Different regions of the device have locally optimized properties: the first doped region has high doping concentration for low resistance, the second doped region has moderate doping for balanced performance, and the third doped region has low doping concentration for high breakdown voltage. This local quality differentiation enables simultaneous achievement of both breakdown voltage and device performance requirements.
2Ease of operation
If gate length is increased to improve control over the channel, then device performance improves, but breakdown voltage may be reduced
Solution Approach 1:
The gate structure extends into the third doped region which has low doping concentration, creating a local region with enhanced electric field control. This allows the gate to effectively control the channel while the low-doped third region maintains high breakdown voltage, resolving the contradiction between channel control and breakdown voltage.
Solution Approach 2:
The gate structure is extended vertically into the third doped region beneath the surface, adding a dimensional aspect to gate control. This vertical extension into the subsurface region enhances channel control without compromising the lateral breakdown voltage characteristics of the device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves higher breakdown voltage and improved device performance by increasing the gate length, allowing for greater control over the channel without reducing breakdown voltage, resulting in enhanced linear drain current.
Implementation Method 1
a gate structure disposed on the semiconductor substrate, wherein a portion of the gate structure extends into the semiconductor substrate and is disposed in a location corresponding to the STI structure
Implementation Method 2
performing ion implantation to form the P-well and an N-well in the semiconductor substrate
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a P-well and an N-well disposed in the semiconductor substrate, a source disposed in the N-well and a drain disposed in the P-well, a shallow trench isolation (STI) structure disposed in the P-well, a gate structure disposed on the semiconductor substrate, wherein a portion of the gate structure extends into the semiconductor substrate and is disposed in a location corresponding to the STI structure.