High Voltage LDMOS Guard Ring Breakdown Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High voltage integrated devices face a trade-off between on-resistance and drain junction breakdown voltage, where improving one characteristic typically degrades the other, making it challenging to achieve optimal performance in smart power devices like LDMOS transistors.
Innovation Solution
The design incorporates multiple field insulation layers and insulation layers between the channel and drain regions in a semiconductor device, allowing for improved on-resistance and breakdown voltage by controlling the doping concentration and drift length of the N-type drift region, while maintaining the breakdown voltage through the use of thicker field insulation layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the doping concentration of the drift region is reduced or the drift length is increased to improve the drain junction breakdown voltage, then the breakdown voltage is improved, but the on-resistance increases and current drivability degrades
Solution Approach 1:
The patent applies local quality by introducing a guard ring structure with specific doping concentration around the drain region. This localized doping modification creates different electrical properties in different areas: the guard ring region has higher doping concentration to improve breakdown voltage locally, while the main drift region maintains lower doping for low on-resistance. This resolves the contradiction by making different parts of the drift region have different doping characteristics suited to their specific functions.
Solution Approach 2:
The patent transitions from a planar two-dimensional structure to a three-dimensional structure by adding the guard ring that extends vertically and surrounds the drain region. This dimensional change allows the breakdown voltage enhancement to occur in a radial and vertical manner without increasing the horizontal drift length, thus improving breakdown voltage without proportionally increasing on-resistance.
2Object-generated harmful factors
If the doping concentration of the drift region is increased or the drift length is decreased to reduce on-resistance and improve current drivability, then the on-resistance is reduced, but the drain junction breakdown voltage is lowered
Solution Approach 1:
The guard ring structure provides localized high doping concentration specifically where needed for breakdown voltage enhancement (around the drain periphery), while the central drift region maintains low doping for optimal current conduction. This spatial differentiation of doping quality allows simultaneous optimization of both on-resistance and breakdown voltage.
Solution Approach 2:
The drift region is segmented into functionally distinct zones: the guard ring region with higher doping concentration for breakdown voltage control, and the main drift region with lower doping concentration for low on-resistance current flow. This segmentation allows each zone to be optimized independently for its specific function, resolving the trade-off between on-resistance and breakdown voltage.
Data Source
AI summary
A high voltage integrated device includes a semiconductor layer having a first conductivity, a source region having a second conductivity and a drift region having the second conductivity which are disposed in the semiconductor layer and spaced apart from each other by a channel region, a drain region having the second conductivity and disposed in the drift region, a gate insulation layer disposed over the channel region, a first field insulation layer and a second field insulation layer which are disposed over the drift region and between the channel region and the drain region, wherein the first field insulation layer and the second field insulation layer are spaced apart from each other, an insulation layer disposed over the drift region and located between the first and second field insulation layers, and a gate electrode disposed over the gate insulation layer, the first field insulation layer, the insulation layer, and the second field insulation layer, wherein the first field insulation layer is adjacent to the channel region and the second field insulation layer is adjacent to the drain region.