LDMOS Guard Ring Isolation for Noise Current Blocking

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Solution Overview

Problem

The existing LDMOS devices require a time-consuming and costly POCl3 process to form a deep sink region, which increases process time and costs, and do not effectively prevent noise current from flowing into the semiconductor substrate.

Innovation Solution

The LDMOS device and manufacturing method involve forming a conductive high-voltage well without a deep sink region, using a second conduction type buried layer, drain extension regions, guard rings, and impurity layers to create an isolation with higher impedance, preventing noise current flow into the semiconductor substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a deep sink region is formed using POCl3 process, then parasitic PNP operation is prevented, but process time and manufacturing cost increase

Engineering Contradiction:

Improveprevention of parasitic PNP operationVSAvoidprocess time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and eliminates the deep sink region formation process from the manufacturing sequence. Instead of forming a separate deep sink region using POCl3, the invention uses the existing guard ring structure with optimized doping to achieve both parasitic PNP prevention and noise current blocking functions, thereby removing the time-consuming process step.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The guard ring structure is given multiple functions: it serves as both a parasitic PNP prevention mechanism and a noise current isolation barrier. By optimizing the doping concentration and electrical characteristics of the guard ring, it simultaneously performs both protective functions that previously required separate structures, reducing overall device complexity and manufacturing steps.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If POCl3 process is used to form deep sink region, then noise current is blocked, but manufacturing cost increases

Engineering Contradiction:

Improvenoise current blockingVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the electrical parameters (doping concentration, depth, and distribution) of the guard ring region to optimize its noise current blocking capability. By adjusting these parameters, the guard ring achieves effective noise isolation without requiring the additional POCl3 processing step, thereby reducing manufacturing cost while maintaining reliability.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If deep sink region is formed, then isolation is achieved, but device complexity increases

Engineering Contradiction:

ImproveisolationVSAvoidstructure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the deep sink region function with the existing guard ring structure. Instead of creating a separate deep sink region beneath the drain, the invention integrates the isolation function into the guard ring by optimizing its doping profile and electrical characteristics, thereby achieving effective isolation while reducing structural complexity.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces process time and costs by eliminating the need for a deep sink region formation, while effectively preventing noise current flow and improving the Safe Operating Area (SOA) of the LDMOS device.

Implementation Method 1

forming a conductive high-voltage well without a deep sink region, using a second conduction type buried layer, drain extension regions, guard rings, and impurity layers to create an isolation with higher impedance, preventing noise current flow into the semiconductor substrate

Methodology Applied

Scientific EffectElectrical Impedance: Electrical Resistance

Data Source

PatentUS9048132B2Lateral double diffused metal oxide semiconductor device and method for manufacturing the same

Publication Date: 2015.06.02 DONGBU HITEK CO LTD

AI summary

An LDMOS device includes a second conduction type buried layer, a first conduction type drain extension region configured to be formed on and/or over a region of the second conduction type buried layer, a second conduction type drain extension region configured to be formed in a partial region of the first conduction type drain extension region, a first conduction type body, a first guard ring configured to be formed around the second conduction type drain extension region and configured to include a second conduction type impurity layer, and a second guard ring configured to be formed around the first guard ring and configured to include a high-voltage second conduction type well and a second conduction type impurity layer. Further, the second conduction type impurity layer of the first guard ring and the second conduction type impurity layer of the second guard ring operate as an isolation.