LDMOS Impurity Diffusion for SOA and Field Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
LDMOS field effect transistors suffer from poor safe operating area (SOA) characteristics and hot carrier resistance due to concentrated electric fields near the drain region, leading to reduced breakdown voltage and increased current flow along the semiconductor substrate surface, making it difficult to maintain current and breakdown voltage characteristics while preventing element size increase.
Innovation Solution
A semiconductor device with an LDMOS field effect transistor featuring an impurity diffusion region with a concentration distribution that increases with depth, distributing the current path and reducing electric field concentration near the drain region, thereby improving SOA and hot carrier resistance without increasing element size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the length of the drift region is increased to improve SOA characteristics, then the SOA characteristics and hot carrier resistance are improved, but the element size increases
Solution Approach 1:
The patent applies local quality by creating an impurity diffusion region with a specific concentration distribution (increasing with depth) in a localized area between the drain region and body region. This localized modification of impurity concentration allows current distribution improvement without extending the overall drift region length, thus enhancing SOA characteristics while maintaining compact element size.
2Manufacturing precision
If impurities are implanted and diffused at high temperature for a long time to form an N-well, then the impurity concentration distribution becomes Gaussian, but the electric field becomes concentrated near the end portion of the drain region
Solution Approach 1:
The patent changes the impurity concentration distribution parameter from a Gaussian distribution (resulting from conventional high-temperature long-time diffusion) to a distribution that increases with depth from the surface. This parameter change is achieved by controlling the diffusion process to create a specific concentration profile in the impurity diffusion region, which redistributes the electric field and reduces concentration near the drain region end portion.
3Reliability
If a region of the first conductivity type with higher concentration toward the drain region is provided, then the ESD surge resistance is improved, but most current still flows along the surface of the semiconductor substrate
Solution Approach 1:
The patent inverts the conventional approach by creating an impurity diffusion region where the concentration increases with depth from the surface, rather than decreasing toward the drain region as in conventional designs. This inverted concentration profile effectively directs current away from the surface and distributes it into the bulk region, reducing surface current flow while maintaining ESD surge resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses impact ionization and maintains current and breakdown voltage characteristics, enhancing the SOA and hot carrier resistance of the LDMOS field effect transistor while preventing a decrease in off-state breakdown voltage.
Implementation Method 1
an impurity diffusion region having, at least in a partial region thereof between the drain region and the body region, an impurity concentration distribution in which a concentration of impurities becomes higher in accordance with a depth from the main face of the semiconductor substrate
Data Source
AI summary
A semiconductor device includes: a body region of a second conductivity type formed in a semiconductor layer of a first conductivity type in a semiconductor substrate; a gate electrode facing the body region via a gate insulating film; a source region of the first conductivity type formed in the body region, on a first side of the gate electrode; a drain region of the first conductivity type formed in the semiconductor substrate such that a field oxide film is disposed between the drain region and a second side of the gate electrode; and an impurity diffusion region of the first conductivity type having, at least in a partial region thereof between the drain region and the body region, an impurity concentration distribution in which a concentration of impurities becomes higher in accordance with a depth from a main face of the semiconductor substrate.