LDMOS Internal Field Rings for Breakdown Voltage
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Solution Overview
Problem
LDMOS transistors in high-voltage power devices face challenges in maintaining optimal breakdown voltage and on-resistance characteristics, particularly due to electric field concentration phenomena in regions with small radii of curvature, leading to suboptimal device performance.
Innovation Solution
The implementation of separate ion implantation processes in strip and corner regions of the drift region to form internal field rings using n-type and p-type impurity ions, optimizing the breakdown voltage and on-resistance characteristics without increasing the radius of curvature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate ion implantation processes are performed in strip and corner regions to form internal field rings, then breakdown voltage is increased and on-resistance is optimized, but manufacturing process complexity increases
Solution Approach 1:
The drift region is divided into two distinct segments: a strip region and a corner region. Each region receives separate ion implantation processes with different doping conditions. The strip region undergoes first condition type impurity ion implantation, while the corner region undergoes second condition type impurity ion implantation. This segmentation allows independent optimization of each region's electrical characteristics, enabling the formation of internal field rings that increase breakdown voltage while maintaining controlled manufacturing complexity through systematic process separation.
Solution Approach 2:
Different doping conditions are applied to different spatial locations within the drift region. The strip region receives one set of implantation parameters (first condition type), while the corner region receives another set (second condition type). This local quality differentiation creates internally optimized field distributions in each region, with the corner region forming internal field rings that specifically address breakdown voltage requirements without compromising overall device performance.
2Reliability
If internal field rings are formed by n-type and p-type impurity implantation in corner regions, then on-resistance characteristic is optimized, but manufacturing steps increase
Solution Approach 1:
The manufacturing process is segmented into distinct implantation stages: first condition type impurity ion implantation for the strip region, followed by second condition type impurity ion implantation for the corner region. This segmentation enables precise control over doping profiles in each region, optimizing on-resistance characteristics through tailored impurity concentrations and distributions while maintaining a systematic manufacturing approach.
Solution Approach 2:
The implantation parameters are changed between regions: different impurity types (n-type vs. p-type), different concentrations, and different energy levels are applied to the strip region versus the corner region. These parameter changes enable the formation of internal field rings with optimized electrical characteristics, specifically improving on-resistance while managing manufacturing complexity through controlled parameter variation rather than fundamental process changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively increases breakdown voltage and optimizes on-resistance characteristics in LDMOS devices by controlling doping concentration and electric field distribution in corner regions, enhancing overall device performance.
Implementation Method 1
separate ion implantation processes in a strip region and a corner region of a drift region, and forming an internal field ring in the corner region by n-type impurity and p-type impurity implantation processes
Data Source
AI summary
Disclosed are an LDMOS device and a method for manufacturing the same capable of decreasing the concentration of a drift region between a source finger tip and a drain, thereby increasing a breakdown voltage. An LDMOS device includes a gate which is formed on a substrate, a source and a drain which are separately arranged on both sides of the substrate with the gate interposed therebetween, a field oxide film which is formed to have a step between the gate and the drain, a drift region which is formed of first condition type impurity ions between the gate and the drain on the substrate, and at least one internal field ring which is formed inside the drift region and formed by selectively ion-implanting second conduction type impurity ions in accordance with the step of the field oxide film.