LDMOS Isolation Region Segmentation for Leakage Control
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Solution Overview
Problem
High-voltage integration circuits face challenges in maintaining high breakdown voltage without increasing the distance between the level shift transistor and the high side region, as increasing the insulating region's length leads to unbalanced charge formation and rapid breakdown voltage decrease.
Innovation Solution
The semiconductor device incorporates a modified insulating region with alternating P-type wells and N-type layers between the LDMOS region and the high side region, formed through ion injection and thermal diffusion, to effectively block leakage current and maintain high breakdown voltage without increasing the insulating region's length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the distance W of the insulating region is increased to reduce leakage current, then leakage current is reduced, but the breakdown voltage rapidly decreases due to unbalanced charge formation
Solution Approach 1:
The insulating region is segmented into multiple alternating P-type and N-type doped regions instead of a single uniform insulating layer. This segmentation creates multiple depletion regions that collectively block leakage current while maintaining charge balance and preventing breakdown voltage degradation.
Solution Approach 2:
Different regions within the insulating structure are doped with different types and concentrations of impurities (P-type vs N-type, with specific concentration ratios). This local quality variation creates optimized depletion regions at each interface, enabling effective leakage blocking without compromising overall breakdown voltage.
2Object-generated harmful factors
If a P type well is formed to insulate the N channel LDMOSFET from the RESURF separation island region, then leakage current is reduced more efficiently, but the breakdown voltage rapidly decreases
Solution Approach 1:
The insulating region is constructed as a composite structure with alternating P-type and N-type doped regions. This composite approach combines the advantages of both doping types to create a multi-depletion region barrier that effectively blocks leakage current while maintaining electrical balance and high breakdown voltage.
Solution Approach 2:
The doping concentration parameters are carefully controlled with specific relationships (e.g., NP1 ≥ NP2 ≥ NP3 and NP1 ≤ NM1 ≤ NM2, with concentration ratios between 0.1-10). These parameter changes optimize the depletion region characteristics to achieve both low leakage current and high breakdown voltage simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach efficiently inhibits leakage current and maintains high breakdown voltage without lengthening the insulating region, reducing manufacturing costs and complexity.
Implementation Method 1
a region of ion injection through a mask on an insulating region located between a laterally-diffused metal oxide semiconductor (LDMOS; also referred to as a lateral double-diffused metal oxide semiconductor) transistor serving as a level shifter and a high side region
Implementation Method 2
formed through ion injection and thermal diffusion
Data Source
AI summary
A semiconductor device and method of manufacturing the same are provided. A device can include an LDMOS region and a high side region on a semiconductor substrate. The device can further include an insulating region separating the LDMOS region from the high side region and the insulating region can include a plurality of second conductive type wells, a plurality of second conductive type buried layer patterns, or both.