LDMOS Device Multiple Gates Doped Regions Breakdown Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional LDMOS devices face challenges with low breakdown voltage when operating at high voltages, leading to reliability issues and high on-state resistance due to the use of active drift regions and field oxides, which block current flow and cause leakage.
Innovation Solution
The design incorporates multiple gates, some of which are floating, with self-aligned lightly doped regions acting as voltage dividers to distribute drain voltage uniformly and shield the gates from high electric fields, reducing hot carrier injection and improving breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a lightly doped layer is formed near the gate edge to reduce electric field, then breakdown voltage increases and hot carrier injection decreases, but on-state resistance increases due to the active drift region
Solution Approach 1:
The device divides the drift region into multiple segments: a lightly doped drift region for voltage blocking and high breakdown voltage, and a heavily doped active drift region for low on-state resistance. This segmentation allows each region to optimize for its specific function without compromising the other.
Solution Approach 2:
Different doping concentrations are applied to different spatial regions: the lightly doped drift region extends from the drain to beneath the gate for voltage blocking, while the heavily doped active drift region is positioned beneath the gate for low resistance current conduction. This local differentiation resolves the contradiction between breakdown voltage and on-state resistance.
2Reliability
If field oxide is extended over the gate to mitigate high voltage stress, then gate oxide breakdown is prevented, but on-state current flow is blocked and leakage increases
Solution Approach 1:
The invention removes the field oxide from the active device region and replaces it with a lightly doped drift region that provides both voltage blocking and current conduction paths. This extraction eliminates the harmful blocking effect of field oxide while maintaining the protective function against gate oxide breakdown through the lightly doped region's voltage distribution.
Solution Approach 2:
The lightly doped drift region acts as an intermediary structure that performs the voltage blocking function previously handled by field oxide, while simultaneously allowing current flow through the heavily doped active drift region beneath the gate. This intermediary structure resolves the contradiction by providing a different mechanism for voltage stress management that doesn't block current.
3Manufacturing precision
If thin gate oxide is used for deep submicron integration, then manufacturing precision is improved, but the device cannot sustain drain voltage of 20V or greater
Solution Approach 1:
The lightly doped drift region serves as an intermediary voltage distribution structure that prevents high electric field concentration at the gate oxide interface. By distributing the drain voltage through this lightly doped region, the electric field at the thin gate oxide is reduced to safe levels, allowing thin gate oxide to be used with high drain voltages.
Solution Approach 2:
The invention shifts the voltage blocking function from the vertical gate oxide dimension to the lateral drift region dimension. The lightly doped drift region extends laterally beneath the gate, providing a volumetric path for voltage distribution that protects the thin gate oxide from high electric fields while maintaining the benefits of thin oxide for manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the breakdown voltage and reliability of LDMOS devices, allowing operation at higher voltages with reduced on-state resistance and minimal hot carrier injection, while maintaining compatibility with CMOS processes.
Implementation Method 1
The doped regions may serve as voltage dividers that uniformly distribute the drain voltage in the drift layer during off-state
Implementation Method 2
the doped regions shield the edge of the gates, especially the control electrode from high electric field, thereby minimizing HCI problems
Implementation Method 3
The gates may serve as masks during the implant process that may be used to form doped regions between the gates and within the semiconductor substrate
Data Source
AI summary
A semiconductor device includes a source region within a semiconductor substrate, a drain region within the semiconductor substrate, a control gate over the semiconductor substrate and between the source region and the drain region, a first gate between the control gate and the drain region, and a first doped region within the semiconductor region and between the control gate and the first gate. The method of forming the semiconductor device may include depositing an electrode material over the semiconductor substrate, patterning the electrode material to form a control gate and a first gate, implanting a first doped region within the semiconductor substrate between the control gate and the first gate while using the control gate and the first gate as a mask, and implanting a source region within the semiconductor substrate.