LDMOS Deep Drain Polysilicon Structure for Smaller High-Voltage Layouts
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Solution Overview
Problem
Conventional LDMOS devices occupy a large area due to the conventional method of forming drain doped regions through ion implantation and heating, which results in a larger device size and reduced conductivity, making them less suitable for miniaturization and high voltage applications.
Innovation Solution
The formation of a reduced surface field laterally diffused MOSFET (RESURF LDMOS) involves creating a groove in the first well region and filling it with a high-doping concentration polysilicon material to form a deep drain doped region, reducing the device area and improving conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If ion implantation and heating diffusion are used to form drain doped region, then doping concentration can be achieved, but device area becomes large
Solution Approach 1:
The patent changes the formation method of the drain doped region from ion implantation and heating diffusion to direct polysilicon filling. This parameter change in the manufacturing process enables achieving high doping concentration (1E18 to 1E20 atoms/cm³) while significantly reducing the required device area, as the polysilicon can be deposited directly into a predefined region without lateral diffusion
Solution Approach 2:
The patent replaces the thermal-mechanical process (ion implantation followed by heating diffusion) with a direct deposition process (polysilicon filling). This substitution eliminates the need for high-temperature heating steps and prevents lateral diffusion, thereby reducing the device area while maintaining the required doping concentration
2Reliability
If conventional ion implantation method is used, then drain doped region can be formed, but conductivity is reduced due to larger area requirement
Solution Approach 1:
By changing the doping method to direct polysilicon filling, the patent achieves higher effective doping concentration in a smaller area. This results in improved conductivity because the current flows through a more concentrated doped region without the lateral spreading that occurs in conventional methods
Solution Approach 2:
The patent applies local quality by concentrating the doping exactly where needed in the drain region through direct polysilicon filling. This creates a highly conductive localized path for current flow, improving overall device conductivity while minimizing the area occupied by the doped region
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the device area while maintaining high doping concentration, enhancing the device's ability to withstand high voltages and improving product quality by minimizing voltage drop.
Implementation Method 1
filling a doped polysilicon material into the groove to form a deep drain doped region
Data Source
AI summary
A semiconductor structure, the semiconductor structure includes a substrate with a first conductivity type and a laterally diffused metal-oxide-semiconductor (LDMOS) device on the substrate, the LDMOS device includes a first well region on the substrate, and the first well region has a first conductivity type. A second well region with a second conductivity type, the second conductivity type is complementary to the first conductivity type, a source doped region in the second well region with the first conductivity type, and a deep drain doped region in the first well region, the deep drain doped region has the first conductivity type.