LDMOS RESURF Structure Tilted Ion Implantation

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Solution Overview

Problem

Conventional LDMOS devices with single implantation method for doped regions achieve only 1-dimensional charge balancing, limiting the enhancement of breakdown voltage and on-state resistance, thus restricting device performance.

Innovation Solution

The LDMOS device incorporates a RESURF structure with a deeper P-type doped region achieved through a tilted ion implantation process, allowing 2-dimensional charge balancing and increased N-type drifting region concentration, enhanced by a trench insulating structure and doped regions surrounding the trench sidewall and bottom.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a single implantation method is used to form a doped region under the field oxide layer, then the doped region can be formed at the surface, but only 1-dimensional charge balancing is achieved and device performance is limited

Engineering Contradiction:
Improvedoped region positioningVSAvoidbreakdown voltage
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent transitions from single-ion implantation (1-dimensional) to tilted dual-ion implantation (2-dimensional), where first and second ions are implanted at different angles and depths to form overlapping doped regions. This dimensional expansion enables comprehensive charge balancing throughout the drift region, significantly enhancing breakdown voltage while maintaining manufacturing precision through controlled implantation parameters

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Strength

If the P-type doped region is added to reduce surface field, then the breakdown voltage can be increased, but the concentration in the N-type doped drifting region must be increased which complicates the device structure

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddoped region structure
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent combines multiple implantation steps into a unified dual-ion implantation process where first and second ions are implanted at different tilt angles to form complementary doped regions. This merging approach achieves comprehensive charge balancing and enhanced breakdown voltage while systematically managing device complexity through integrated process design

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the concentration in the N-type drifting region is increased to reduce on-state resistance, then the on-state resistance is reduced, but the device structure becomes more complex

Engineering Contradiction:
Improveon-state resistanceVSAvoiddoped region configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating spatially differentiated doped regions through tilted dual-ion implantation. First and second ions are implanted at different angles and depths to form distinct doped regions with optimized local concentrations. This enables reduced on-state resistance through increased N-type concentration in critical areas while maintaining overall device performance and managing structural complexity

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly enhances device performance by achieving higher breakdown voltage and lower on-state resistance, thereby improving the operational efficiency of LDMOS devices.

Implementation Method 1

a tilted ion implantation process is then performed, so that the position of the P-type doped region is deeper, and 2-dimensional charge balancing is further achieved

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS8785969B2Resurf structure and LDMOS device
Publication Date: 2014.07.22 EPISIL TECH INC
  • US8785969B2 patent drawing
  • US8785969B2 patent drawing
  • US8785969B2 patent drawing

AI summary

A reduced surface field (RESURF) structure and a lateral diffused metal oxide semiconductor (LDMOS) device including the same are provided. The RESURF structure includes a substrate of a first conductivity type, a deep well region of a second conductivity type, an isolation structure, at least one trench insulating structure, and at least one doped region of the first conductivity type. The deep well region is disposed in the substrate. The isolation structure is disposed on the substrate. The trench insulating structure is disposed in the deep well region below the isolation structure. The doped region is disposed in the deep well region and surrounds a sidewall and a bottom of the trench insulating structure.