LDMOS Device Second Gate Structure Parasitic Bipolar Suppression
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Solution Overview
Problem
Lateral Diffused Metal-Oxide Semiconductor (LDMOS) devices with four terminals have a significantly poorer Safe Operating Area (SOA) compared to three-terminal devices, limiting their usefulness due to parasitic bipolar transistor behavior and hot carrier ionization, which reduces their operational reliability and versatility, especially in power electronics.
Innovation Solution
Incorporating a further gate structure that overlays the gap between the source and body contact regions, reducing parasitic resistance and enhancing the SOA by making the channel region more conductive under applied voltages, thereby increasing the current and voltage limits before parasitic bipolar transistor turn-on.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a four-terminal LDMOS device is used to enable separate body contact terminal, then device control flexibility is improved, but parasitic bipolar transistor behavior worsens leading to reduced SOA
Solution Approach 1:
A second gate structure is introduced as an intermediary element between the source and body contact regions. This second gate acts as a mediator to control the parasitic bipolar transistor behavior, allowing the body contact terminal to be separately controlled while suppressing the harmful parasitic effects that would otherwise limit the SOA.
2Reliability
If further gate structure is added to reduce parasitic resistance, then SOA is improved, but device complexity increases
Solution Approach 1:
The second gate structure serves multiple functions simultaneously: it reduces parasitic resistance in the body contact region, suppresses parasitic bipolar transistor turn-on, and provides additional control over the channel conductivity. This multi-functionality allows SOA improvement without proportionally increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved SOA allows for safer operation over a greater range of current-voltage conditions, enhancing the device's reliability and versatility, particularly in high-power applications without requiring additional manufacturing steps or facilities, thus maintaining cost-effectiveness.
Implementation Method 1
a second insulated gate structure overlying a second portion of the upper surface laterally located between the spaced apart source and body contact regions, wherein the second gate conductor is electrically coupled to the body contact region
Data Source
AI summary
A lateral-diffused-metal-oxide-semiconductor device having improved safe-operating-area is provided. The LDMOS device includes spaced-apart source and drain, separated by a first insulated gate structure, and spaced-apart source and body contact The spaced-apart source and BC are part of the emitter-base circuit of a parasitic bipolar transistor that can turn on prematurely, thereby degrading the SOA of prior art four-terminal LDMOS devices. Rather than separating the source and BC with a shallow-trench-isolation region as in the prior art, the semiconductor surface in the gap between the spaced-apart source and BC has there-over a second insulated gate structure, with its gate conductor electrically tied to the BC. When biased, the second insulated gate structure couples the source and BC lowering the parasitic resistance in the emitter-base circuit, thereby delaying turn-on of the parasitic transistor and improving the SOA of such 4-T LDMOS devices.