LDMOS Breakdown Voltage via Segmented Drain and Field Oxide
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Solution Overview
Problem
High voltage MOS transistors face breakdown issues due to increased electric fields, leading to hot carrier effects and device degradation, particularly in advanced processing technologies where the space between source and drain regions narrows, causing snapback breakdown and undesirable threshold voltage shifts.
Innovation Solution
The implementation of an ultra-high voltage laterally-diffused metal-oxide-semiconductor (LDMOS) device with a large P-N junction curvature under the gate, involving the formation of separated well regions and insulation layers to increase breakdown voltage by reducing electric fields and enhancing junction curvature, thereby improving device reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the space between source and drain regions is narrowed in advanced processing technology, then device integration and miniaturization are improved, but breakdown voltage decreases and hot carrier effects increase
Solution Approach 1:
The drain region is segmented into multiple doped regions with different doping concentrations (first doped region, second doped region, third doped region) arranged in sequence from the channel to the substrate. This segmentation creates a gradual doping profile that reduces the electric field peak near the channel-drain junction, thereby maintaining high breakdown voltage while allowing narrow spacing between source and drain for device integration.
Solution Approach 2:
Different regions of the drain structure are assigned different doping concentrations tailored to their specific functional requirements: the first doped region near the channel has higher doping to control threshold voltage, while the second and third doped regions extending toward the substrate have progressively lower doping to reduce electric field peaks and enhance breakdown voltage. This local quality differentiation resolves the contradiction between miniaturization and reliability.
2Speed
If the electric field in the channel region is increased, then device performance and switching speed are improved, but hot carrier effects and device degradation are exacerbated
Solution Approach 1:
The invention converts the harmful high electric field near the channel-drain junction into a beneficial gradual field distribution by implementing a multi-region doped structure. The electric field that would normally cause hot carrier effects is redistributed across multiple doped regions, with each region contributing to field modulation. This transforms the harmful concentrated field into a beneficial distributed field profile that maintains switching speed while reducing hot carrier injection.
Solution Approach 2:
The doping concentration parameter is changed across different spatial regions of the drain structure. By varying the doping concentration from the first doped region (higher concentration) to the second and third doped regions (lower concentrations), the electric field distribution is fundamentally altered. This parameter change enables the device to operate at high speeds while preventing the electric field from reaching levels that cause hot carrier degradation.
3Ease of manufacture
If conventional MOS transistor structures are used in advanced technology, then manufacturing simplicity is maintained, but snapback breakdown and threshold voltage shifts occur
Solution Approach 1:
The multi-region doped drain structure is formed as a preliminary action during the manufacturing process, before final device operation. The sequential doping of first, second, and third doped regions creates the desired field distribution profile in advance, preventing snapback breakdown and threshold voltage shifts during device operation. This preliminary structural preparation maintains manufacturing simplicity while ensuring reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively enhances the breakdown voltage of high voltage MOS transistors, reducing the risk of hot carrier-induced degradation and permanent physical damage, resulting in improved reliability and performance.
Implementation Method 1
increased electric fields in the channel region
Implementation Method 2
The 'hot' electrons cause impact ionization of materials near the drain edge and create electron-hole pairs
Data Source
AI summary
Embodiments for the present disclosure include a semiconductor device, an ultra-high voltage (UHV) laterally-diffused metal-oxide-semiconductor (LDMOS) transistor, and methods of forming the same. An embodiment includes a first well region of a first conductivity type in a top surface of a substrate, and a second well region of a second conductivity type in the top surface of the substrate. The second well region laterally separated from the first well region by a portion of the substrate. The embodiment further includes a third region of the second conductivity type in the first well region, and a first field oxide region in the first well region, a second field oxide region in the second well region, the second field oxide region having a second bottom surface, and the first field oxide region having a first bottom surface lower than the second bottom surface and on and directly contacting the third region.