LDMOS Semiconductor Device for High Voltage Isolation
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Solution Overview
Problem
Conventional high voltage half bridge driver integrated circuits face challenges in integrating a diode with high reverse breakdown voltage, as typical integrated circuit process technology does not provide such diodes, and existing solutions with high voltage LDMOS devices require complex external circuitry.
Innovation Solution
A semiconductor device comprising a substrate with specific conductivity type regions and conductors, forming JFET devices that emulate diode functionality without the need for complex external circuitry, using a structure with isolator layers and buried regions to achieve high voltage isolation and diode junctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high voltage LDMOS device is used to emulate a diode, then high reverse breakdown voltage is achieved, but device complexity increases due to complex external circuitry
Solution Approach 1:
The patent merges the diode emulation function directly into the LDMOS device structure by integrating a first diode junction between the drain region and substrate, and a second diode junction between the gate region and substrate. This integration eliminates the need for complex external circuitry while maintaining high reverse breakdown voltage capability, as the diode functions are embedded within the semiconductor device itself rather than requiring separate external components.
2Device complexity
If a built-in bootstrap diode is integrated in the half-bridge driver, then application circuit simplification is achieved, but high reverse breakdown voltage diodes are not available in typical integrated circuit process technology
Solution Approach 1:
The patent changes the structural parameters of the LDMOS device to achieve high reverse breakdown voltage. Specifically, it utilizes a drift region with controlled doping concentration and thickness, along with specific junction configurations (first diode junction between drain and substrate, second diode junction between gate and substrate), to enable the integrated diode to withstand high reverse voltages that are normally unachievable in standard IC processes. This allows the bootstrap diode to be integrated without requiring special high-voltage process technologies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device provides a simple and cost-effective solution for high voltage isolation, enabling efficient energy transfer and improved breakdown voltage performance, suitable for use in half-bridge driver integrated circuits and bootstrap diode applications.
Implementation Method 1
first and second conductors, arranged on the first region and separated by an isolator layer; and a third conductor, separated from the first and second conductors by the isolator layer
Implementation Method 2
the second region forms a diode junction with the first region
Implementation Method 3
the first conductor is arranged to provide a drain terminal, the second conductor is arranged to provide a source terminal, the third conductor is arranged to provide a gate terminal. The semiconductor device is preferably a JFET device
Data Source
AI summary
A semiconductor device includes a substrate of a first conductivity type with relatively low impurity concentration; a first region of a second conductivity type with relatively low impurity concentration, =located in the substrate; a second region of the first conductivity type with relatively high impurity concentration, located in the substrate; first and second conductors, located on the first region and separated from each other by an isolator layer; and a third conductor, separated from the first and second conductors by the isolator layer, and located on the second region. The first conductor provides a drain terminal. The second conductor provides a source terminal. The third conductor provides a gate terminal.