LDMOS Sense Transistor Structure for High Voltage Current Sensing

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Solution Overview

Problem

Integrated circuits with high-voltage n-channel MOS transistors face challenges in determining current levels without increasing fabrication complexity or size, particularly in ensuring that breakdown does not occur between high voltage power and blocking transistors.

Innovation Solution

Incorporating a high voltage n-channel MOS power transistor integrated with a high voltage n-channel MOS blocking transistor, where the power transistor's body is directly connected to the substrate, and the blocking transistor's body is isolated, with aligned drift areas to prevent breakdown, and using metal interconnects or n-type doped regions for electrical coupling of drain contact regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a high voltage n-channel MOS power transistor is integrated with a blocking transistor to enable current sensing, then current sensing capability is improved, but fabrication complexity increases

Engineering Contradiction:
Improvecurrent sensing capabilityVSAvoidfabrication complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines a high voltage power transistor and a blocking transistor into a single integrated structure where the blocking transistor is formed within the drift region of the power transistor. This merging allows current sensing functionality to be added without requiring separate discrete components, thereby improving measurement capability while minimizing the increase in overall device complexity through shared fabrication processes

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated structure serves multiple functions: the power transistor handles high voltage switching while the blocking transistor provides current sensing capability. The shared drift region and overlapping fabrication steps create a multi-functional device that achieves both power handling and measurement functions without proportionally increasing fabrication complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the drift areas of power and blocking transistors are aligned to prevent breakdown, then reliability is improved, but device area increases

Engineering Contradiction:
Improvebreakdown preventionVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The blocking transistor is nested within the drift region of the power transistor, with the blocking transistor's drift area aligned and overlapping with the power transistor's drift area. This nesting arrangement allows the blocking transistor to be positioned within the existing high voltage field region, preventing breakdown at the interface while utilizing the available space efficiently to minimize overall device area

Inventive Principle:
Principle #7Nested doll (Nesting)

3Ease of manufacture

If the body of the power transistor is directly connected to the substrate to simplify fabrication, then ease of manufacture is improved, but isolation of the blocking transistor becomes more difficult

Engineering Contradiction:
Improvefabrication simplicityVSAvoidisolation complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent applies different body connection configurations to different regions: the power transistor body is directly connected to the substrate for fabrication simplicity, while the blocking transistor body is isolated from the substrate through local isolation structures. This local differentiation allows the majority of the device to benefit from simplified fabrication while the specific region requiring isolation gets the necessary treatment

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8648416B1LDMOS sense transistor structure for current sensing at high voltage
Publication Date: 2014.02.11 TEXAS INSTRUMENTS INC
  • US8648416B1 patent drawing
  • US8648416B1 patent drawing
  • US8648416B1 patent drawing

AI summary

An integrated circuit includes a high voltage n-channel MOS power transistor integrated with a high voltage n-channel MOS blocking transistor. The power transistor and the blocking transistor have electrically coupled drain contact regions. In one embodiment, a drain area of the power transistor is separate from a drain area of the blocking transistor. In another embodiment, the drain area of the power transistor is contiguous with the drain area of the blocking transistor. The power transistor and the blocking transistor have drain extensions with drift areas. The power transistor drift area is laterally adjacent to both sides of the blocking transistor drift area. The drift areas are aligned so that breakdown does not occur between the power transistor and the blocking transistor. The body of the blocking transistor is isolated from the substrate.