LDMOS Transistor Shallow Doped Region for On-Resistance Reduction
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Solution Overview
Problem
The performance of existing LDMOS transistors is limited by high on-resistance between the source and drain regions, which restricts operating current, and existing ion implantation processes lead to uneven impurity ion distribution and local high resistance, affecting channel threshold voltage and current.
Innovation Solution
A first shallow doped region is formed in the drain and drift regions with the same doping type as the drain, but with a depth less than the drain and drift regions, to improve impurity ion distribution uniformity and reduce surface resistance, thereby increasing operating current and preventing short channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation process is used to form drain and drift regions, then regions are formed with required doping, but impurity ion distribution becomes uneven causing local high resistance
Solution Approach 1:
The drain region formation is segmented into two distinct doping regions: a first doped region with lower doping concentration and a second doped region with higher doping concentration. This segmentation allows each region to serve different functions - the first region provides uniform distribution while the second region provides adequate conductivity, resolving the contradiction between uniformity and resistance.
Solution Approach 2:
Different doping concentrations are applied to different spatial locations within the drain region. The first doped region (near the drift region) uses lower concentration for uniformity, while the second doped region (near the source) uses higher concentration for conductivity. This local quality differentiation resolves the uniform distribution vs. low resistance contradiction.
2Object-affected harmful factors
If deeper doping is used to reduce resistance, then on-resistance decreases, but breakdown voltage is compromised
Solution Approach 1:
The doping concentration parameter is changed across different regions rather than using a uniform deep doping. The first doped region uses lower concentration (1E16 to 1E18 atoms/cm³) and the second uses higher concentration (1E18 to 1E20 atoms/cm³), both at controlled depths. This parameter differentiation reduces on-resistance through the high-doped second region while maintaining breakdown voltage through the controlled depth and lower-doped first region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces on-resistance and enhances the uniformity of impurity ion distribution, increasing the operating current of LDMOS transistors while maintaining breakdown voltage and preventing local high resistance impacts on threshold voltage.
Implementation Method 1
existing ion implantation processes lead to uneven impurity ion distribution and local high resistance
Implementation Method 2
A first shallow doped region is formed in the drain and drift regions with the same doping type as the drain
Data Source
AI summary
Lateral double-diffused MOSFET transistor and fabrication method thereof are provided. A shallow trench isolation structure is formed in a semiconductor substrate. A drift region is formed in the semiconductor substrate and surrounding the shallow trench isolation structure. A body region is formed in the semiconductor substrate and distanced from the drift region. A gate structure is formed on a portion of each of the body region, the drift region, and the shallow trench isolation structure. A drain region is formed in the drift region on one side of the gate structure. A source region is formed in the body region on an other side of the gate structure. A first shallow doped region is formed in the drain region and the drift region to surround the shallow trench isolation structure.