LDMOS Structure With Guard Ring and STI for Compact Breakdown Control
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Solution Overview
Problem
Current LDMOS devices face challenges with on-state breakdown voltage and compatibility due to their large size, which limits their performance in high-voltage and high-frequency applications.
Innovation Solution
The design incorporates a guard ring and guard regions surrounding the gate structures, along with shallow trench isolation, to reduce the overall device area and enhance breakdown voltage compatibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDMOS device structure is used, then operational bandwidth and efficiency are maintained, but device area becomes too large leading to unsatisfactory breakdown voltage and compatibility
Solution Approach 1:
The device is segmented into multiple gate structures (first gate structure and second gate structure) with corresponding source regions and drain regions. This segmentation allows for optimized electrical characteristics while reducing the overall device footprint, resolving the contradiction between reliability and area.
Solution Approach 2:
The guard ring structure is nested around the gate structures, and shallow trench isolation is nested around the guard ring, creating a compact layered configuration. This nesting approach maximizes space utilization and reduces device area while maintaining breakdown voltage characteristics.
2Adaptability or versatility
If device area is reduced to improve breakdown voltage, then compatibility improves, but operational bandwidth and efficiency may be compromised
Solution Approach 1:
Different regions of the device are assigned different functions: gate structures for bandwidth control, source regions for charge injection, drain regions for current collection, and guard rings for voltage breakdown control. This local differentiation allows the device to achieve both high operational bandwidth and improved compatibility within a reduced area.
Solution Approach 2:
The device transitions from a planar two-dimensional layout to a three-dimensional structure with vertical stacking of source, gate, and drain regions. This dimensional change enables higher integration density while maintaining the electrical performance required for both bandwidth and compatibility.
Data Source
AI summary
A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.


