LDMOS Trench Capacitor for Breakdown Voltage and On-Resistance
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Solution Overview
Problem
Existing LDMOS devices have low breakdown voltage and high on-resistance, which limits their performance in applications such as driver chips for thin-film transistor liquid crystal displays.
Innovation Solution
A semiconductor structure is formed by creating a trench in a base, depositing a first dielectric layer and a conductor layer on the trench, and forming a drift region, where the conductor layer and dielectric layer form a capacitor structure to optimize power line distribution, reducing the electric field and enhancing the breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDMOS structure is used, then manufacturing process is simple, but breakdown voltage is low and on-resistance is high
Solution Approach 1:
The patent divides the device structure by introducing a trench that segments the drift region into multiple portions. This segmentation allows independent optimization of different regions, enabling higher breakdown voltage through tailored doping profiles and junction depths in each segment while maintaining manufacturability through standard trench formation processes.
Solution Approach 2:
The patent implements a nested structure where the conductor layer is positioned within the trench, surrounded by drift region portions on multiple sides. This nesting arrangement allows the conductor to be embedded within the active device structure, optimizing electric field distribution and reducing on-resistance without requiring separate external components.
2Reliability
If conductor layer and dielectric layer form capacitor structure, then electric field is reduced and breakdown voltage is enhanced, but manufacturing process becomes more complex
Solution Approach 1:
The patent merges the capacitor formation process with the existing trench formation and filling processes. The dielectric layer is deposited during the same sequence as other trench fillings, and the conductor layer is formed using standard deposition techniques already present in the manufacturing line, thereby integrating the capacitor function without adding separate manufacturing steps.
Solution Approach 2:
The trench is formed and partially filled with dielectric material before final conductor deposition. This preliminary action allows the capacitor structure to be prepared in advance, with the conductor layer subsequently positioned precisely within the pre-formed trench environment, simplifying the overall manufacturing sequence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the breakdown voltage and reduces on-resistance, thereby enhancing the overall performance of the LDMOS device.
Implementation Method 1
the conductor layer and dielectric layer form a capacitor structure to optimize power line distribution, reducing the electric field
Implementation Method 2
a material of the first dielectric layer is silicon oxide, and the process of the forming a first dielectric layer includes a thermal oxidation growth process
Data Source
AI summary
A semiconductor structure and a method for forming the same are provided in embodiments of the present disclosure. The forming method includes: providing a base; forming a trench in the base, and forming a first dielectric layer on the bottom surface and side walls of the trench; forming a conductor layer, the conductor layer covering the first dielectric layer on the bottom surface of the trench; forming a second dielectric layer in the trench on the conductor layer; and forming a drift region on a side, provided with the trench, of the base. The forming method can improve the breakdown voltage of an LDMOS device and also reduce the Ron of the LDMOS device, thereby improving the performance of the LDMOS device.