Floating Plate Configuration for LDMOSFET Withstand Voltage
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Solution Overview
Problem
Conventional LDMOSFET semiconductor devices face challenges in uniformizing potential distribution between impurity regions, leading to non-uniform electric fields and reduced withstand voltage due to varying sizes of floating plates, resulting in unequal capacitances across capacitors.
Innovation Solution
The semiconductor device incorporates a configuration where multiple floating plates with different peripheral lengths are alternately arranged to satisfy the L/d=constant relationship, ensuring equalized total capacitances and uniform electric fields between counter electrodes, thereby uniformizing potential distribution and enhancing withstand voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If floating plates of different sizes are used to cover the drift region, then the coverage area is improved, but the capacitance uniformity deteriorates
Solution Approach 1:
The patent applies local quality by making each floating plate have a different size according to the local requirements of the drift region. The first floating plate has a larger area to cover a larger drift region portion, while the second floating plate has a smaller area for a smaller drift region portion. This ensures that each capacitor formed under different floating plates has substantially equal capacitance values, achieving capacitance uniformity across the entire drift region while maximizing coverage area.
2Area of stationary object
If floating plates are arranged to maximize coverage, then the drift region coverage is improved, but the electric field uniformity deteriorates
Solution Approach 1:
The patent makes different parts of the floating plate structure have different properties. Specifically, the first floating plate is designed with a larger area and the second floating plate with a smaller area, each positioned to cover specific portions of the drift region. This local differentiation ensures that the electric field distribution becomes uniform across the entire drift region, as each local area receives appropriate capacitance compensation tailored to its specific geometry and electric field requirements.
3Device complexity
If equal-sized floating plates are used, then the capacitance calculation is simplified, but the potential distribution uniformity deteriorates
Solution Approach 1:
The patent implements local quality by designing floating plates with different sizes matched to the local characteristics of the drift region. The first floating plate covers a first portion with a specific area, while the second floating plate covers a second portion with a different area. Although this increases structural complexity, it achieves substantially equal capacitance values across all capacitors formed under different floating plates, thereby uniformizing the potential distribution in the drift region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively equalizes the total capacitances of capacitors, resulting in a uniform electric field and improved potential distribution between impurity regions, thereby enhancing the withstand voltage of the semiconductor device.
Implementation Method 1
ensuring equalized total capacitances and uniform electric fields between counter electrodes
Implementation Method 2
uniform electric fields between counter electrodes, thereby uniformizing potential distribution
Data Source
AI summary
Semiconductor device including semiconductor layer, first impurity region on surface layer portion of semiconductor layer, body region at interval from first impurity region, second impurity region on surface layer portion of body region, field insulating film at interval from second impurity region, gate insulating film on surface of the semiconductor layer between second impurity region and field insulating film, gate electrode on gate insulating film, first floating plate as ring on field insulating film, and second floating plate as ring on same layer above first floating plate. First and second floating plates formed by at least three plates so that peripheral lengths at centers in width direction thereof are entirely different from one another, alternately arranged in plan view so that one having relatively smaller peripheral length is stored in inner region of one having relatively larger peripheral length, and formed to satisfy relational expression: L/d=constant.