LDMOSFET Withstand Voltage via Segmented Floating Plates
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Solution Overview
Problem
Conventional LDMOSFETs face challenges in reducing electric field concentration near isolation regions, leading to inefficient chip utilization, high manufacturing costs, and complex processing due to the need for thick insulating films and fine patterning, which complicates the reduction of electric field concentration and increases costs.
Innovation Solution
The semiconductor device incorporates a first conductive plate electrically connected to the isolation region and a second conductive plate in a floating state, with overlapping regions, to distribute electric potential and reduce electric field concentration through capacitive coupling, allowing for increased withstand voltage without the need for extensive diffusion regions or thick insulating films.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a diffusion region less doped than the isolation region is extended from the isolation region toward the drain region, then the electric field concentration in the vicinity of the isolation region edge is reduced, but the element formation regions cannot be efficiently arranged with respect to chip size
Solution Approach 1:
The patent divides the conductive structure into two separate conductive plates instead of using a single extended diffusion region. The first conductive plate is connected to the isolation region while the second conductive plate is floating, creating segmented electric field control that reduces concentration at the isolation region edge without requiring extensive area extension into the chip.
Solution Approach 2:
The patent introduces a floating conductive plate as an intermediary element between the isolation region and the drain electrode. This intermediate structure mediates the electric field distribution, reducing field concentration at the isolation region edge while maintaining compact geometry that allows efficient chip area utilization.
2Reliability
If a conductive layer extending from the top surface of the isolation region toward the drain region is formed, then the electric field concentration is reduced, but a thick insulating film is required which increases manufacturing cost
Solution Approach 1:
The conductive structure is segmented into two plates with different electrical connections. The first conductive plate connected to the isolation region and the second floating conductive plate create distributed electric field control that achieves field concentration reduction without requiring a single thick insulating film structure, thereby reducing manufacturing complexity and cost.
Solution Approach 2:
The patent changes the electrical connection parameter of the second conductive plate to be floating rather than connected to a fixed potential. This parameter change allows the structure to achieve electric field control through capacitive coupling rather than requiring thick insulating films for electrical isolation, simplifying the manufacturing process.
3Reliability
If fine patterning in a small region between the conductive layer and the drain region is required, then the electric field concentration is reduced, but the manufacturing process becomes complicated
Solution Approach 1:
The patent segments the conductive structure into two distinct plates with different functional roles. The first conductive plate handles the connection to the isolation region while the second floating conductive plate provides field control. This segmentation allows each component to be optimized independently, reducing the need for complex fine patterning in a single integrated structure.
Solution Approach 2:
The patent utilizes the vertical dimension by stacking the two conductive plates at different heights above the isolation region. This dimensional approach allows electric field control to be achieved through vertical positioning and capacitive coupling rather than requiring complex lateral fine patterning, thereby simplifying the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces electric field concentration, enhances withstand voltage, and allows for more efficient chip layout and manufacturing by simplifying the process, thereby increasing the semiconductor device's performance and reducing costs.
Implementation Method 1
a first conductive plate in the insulating layer under the wiring layer, which is arranged in a manner covering over a junction region between the isolation region and the semiconductor layer, and is electrically connected to the isolation region; and a second conductive plate arranged, in a floating state, between the first conductive plate and the wiring layer
Data Source
AI summary
In a conventional semiconductor device, there has been a problem that, in a region where a wiring layer to which a high electric potential is applied traverses a top surface of an isolation region, the withstand voltage is deteriorated. In a semiconductor device of the present invention, an epitaxial layer is deposited on a substrate, and an LDMOSFET is formed in one region divided by an isolation region. In a region where a wiring layer connected to a drain electrode traverses a top surface of the isolation region, a conductive plate having a ground electric potential and another conductive plate in a floating state are formed under the wiring layer. With this structure, electric field is reduced in the vicinity of the isolation region under the wiring layer, whereby a withstand voltage of the LDMOSFET is increased.