LDO Regulator Light Load Stability via AC Feedback Loop

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Solution Overview

Problem

Conventional linear regulators experience a reduction in phase margin at lighter load currents due to a decrease in the frequency of the output pole, which is optimized for high load conditions, leading to instability.

Innovation Solution

An additional AC-coupled feedback loop is introduced between the error amplifier output and the base of the pass transistor, comprising a bipolar feedback transistor connected in parallel with the pass transistor, with a feedback capacitor between the collector of the feedback transistor and the error amplifier output, increasing the frequencies of Pole 1 and Pole 2 to offset the decreased Pole 3 frequency at lighter loads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a large output capacitor is used to ensure stability under varying conditions, then stability margin is improved, but the frequency of the output pole decreases at light load causing instability

Engineering Contradiction:
Improvephase marginVSAvoidpole frequency
Core Design Contradiction:
Stability of the object's compositionVSSpeed

Solution Approach 1:

The patent employs preliminary frequency compensation through properly selected RC components (Rc and Cc) that pre-establish the desired pole-zero configuration. The compensation network is designed in advance to counteract the frequency shift that occurs at light load conditions. By pre-configuring the compensation parameters, the system maintains adequate phase margin across the full load range without requiring active adjustment during operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9069368B2Light load stability circuitry for LDO regulator
Publication Date: 2015.06.30 ANALOG DEVICES INT UNLTD CO
  • US9069368B2 patent drawing
  • US9069368B2 patent drawing
  • US9069368B2 patent drawing

AI summary

A linear regulator contains an additional AC-coupled feedback loop between the output of the error amplifier and the base of the pass transistor that increases the frequency of the pole at the output of the error amplifier at light load currents to at least partially offset the decreased frequency of the output pole at the lighter load currents. Thus, a desired phase margin is preserved. The AC-coupled feedback loop includes a bipolar feedback transistor connected in parallel with the pass transistor. A resistor is connected to the emitter of the feedback transistor to reduce the relative gain of the feedback transistor above light load currents. A feedback capacitor Cfb is connected between the collector of the feedback transistor and the output of the error amplifier. The negative AC feedback increases the pole frequency at the output of the error amplifier and the base of the pass transistor.