LDO Regulator Non-Linear Biasing for Startup Current Clamping
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Solution Overview
Problem
Conventional low dropout (LDO) regulators require expensive electrolytic output capacitors to prevent oscillation, and they face challenges in managing current rushes during startup, which can damage components.
Innovation Solution
The LDO regulator employs a differential amplifier, clamped current mirrors, a clamped transconductor, and a resistor-capacitor (RC) circuit with non-linear biasing to control output current and prevent damage, using a variable resistor and capacitor to adjust resistance responsive to bias current, ensuring non-linear proportionality and improved phase margin.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional compensation schemes with output capacitor and equivalent series resistance are used, then oscillation is prevented, but expensive electrolytic capacitors are required
Solution Approach 1:
The patent extracts the compensation function from the traditional output capacitor-based scheme and implements it through an active RC circuit with operational amplifier, variable resistor, and capacitor. This removes the dependency on expensive electrolytic capacitors while maintaining the oscillation prevention function through active compensation of the low-frequency pole.
Solution Approach 2:
The patent replaces the passive mechanical/electrical RC compensation network with an active electronic compensation system using operational amplifier, variable resistor, and capacitor. This substitution enables dynamic adjustment of compensation parameters and eliminates the need for bulky electrolytic capacitors.
2Reliability
If pass transistor is used to regulate output voltage, then voltage regulation is achieved, but low-frequency pole is introduced causing oscillation risk
Solution Approach 1:
The patent introduces a feedback loop with operational amplifier that senses the output voltage and adjusts the pass transistor gate voltage accordingly. The variable resistor and capacitor in the feedback network create a compensating zero that counteracts the low-frequency pole introduced by the pass transistor, stabilizing the frequency response while maintaining voltage regulation.
Solution Approach 2:
The patent employs a variable resistor that can dynamically adjust its resistance value to optimize compensation across different operating conditions. This dynamic adjustment allows the compensation network to adapt to changing load conditions and maintain stability throughout the operating range.
3Speed
If startup current is not limited, then quick voltage establishment is achieved, but component damage occurs from current rush
Solution Approach 1:
The patent incorporates a startup current limiting circuit that activates during startup to limit the current through the pass transistor. This preliminary action prevents excessive current rush that could damage components, while still allowing the output voltage to establish quickly within safe current limits.
Solution Approach 2:
The patent uses a current-limiting resistor or soft-start circuit that provides cushioning against inrush current during startup. This protective element is in place before startup occurs, preventing damage from current rush while allowing normal operation once startup is complete.
Data Source
AI summary
An LDO regulator is provided that includes a bias circuit that generates a bias current having a non-linear relationship to an output current for the LDO regulator. The LDO regulator is also configured to clamp the output current.


