N-Type LDO Regulator with Boosted Gate Drive and Fast Settling
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Solution Overview
Problem
Low dropout (LDO) regulators using n-type field effect transistors face limitations in setting the regulated voltage close to the supply voltage due to the need for the gate voltage to be above the threshold voltage of the transistor, leading to a maximum regulated voltage limited by the supply voltage minus the threshold voltage.
Innovation Solution
Incorporating a voltage booster between the amplifier and the gate of the pass transistor to boost the gate voltage, along with a detection circuit and multiplexer to switch clock frequencies based on voltage differences, allowing the regulated voltage to approach the supply voltage and reducing settling time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the gate voltage of the pass transistor is increased to set the regulated voltage close to the supply voltage, then the regulated voltage can approach the supply voltage, but the transistor requires a gate voltage above the threshold voltage which limits the maximum regulated voltage to supply voltage minus threshold voltage
Solution Approach 1:
A voltage booster circuit is introduced as an intermediary component between the amplifier and the pass transistor gate. This booster circuit generates a boosted voltage that is higher than the supply voltage to drive the gate of the pass transistor, enabling the regulated voltage to approach the supply voltage without being limited by the transistor threshold voltage.
Solution Approach 2:
The patent changes the voltage parameter by using a voltage booster to generate a voltage higher than the supply voltage. This parameter change allows the gate voltage to exceed the supply voltage, thereby enabling the regulated output voltage to approach the supply voltage level despite the transistor threshold voltage requirement.
2Loss of time
If the clock frequency of the voltage booster is increased to reduce settling time during transients, then the charge pumping speed increases and settling time decreases, but power consumption increases
Solution Approach 1:
The patent implements dynamic clock frequency switching for the voltage booster based on the operating conditions. A detection circuit monitors the voltage difference between reference and feedback voltages, and a multiplexer switches between a first clock signal (lower frequency) and a second clock signal (higher frequency). During transients when voltage difference exceeds a threshold, the higher frequency reduces settling time; during steady-state operation, the lower frequency reduces power consumption.
Solution Approach 2:
The detection circuit provides feedback by monitoring the voltage difference between the reference voltage and the feedback voltage from the output. This feedback signal controls the multiplexer to select appropriate clock frequencies, creating a closed-loop control system that optimizes the balance between settling time and power consumption based on actual operating conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the LDO regulator to set the regulated voltage closer to the supply voltage and reduces settling time by increasing charge pumping speed during transients, improving stability and power efficiency.
Implementation Method 1
the voltage booster is configured to, during a first phase, charge the boost capacitor with current from the output of the amplifier, and, during a second phase, boost a voltage on the boost capacitor and transfer charge from the boost capacitor to the output capacitor
Implementation Method 2
a multiplexer having a first input, a second input, an output, and a select input, wherein the first input of the multiplexer is configured to receive a first clock signal, the second input of the multiplexer is configured to receive a second clock signal having a higher frequency than the first clock signal
Implementation Method 3
a detection circuit having an input and an output, wherein the input of the detection circuit is coupled to the amplifier, and the output of the detection circuit is coupled to the select input of the multiplexer
Data Source
AI summary
A voltage regulator includes a pass transistor coupled between an input and an output of the voltage regulator, and an amplifier having a first input configured to receive a reference voltage, and a second input coupled to the output of the voltage regulator via a feedback path. The voltage regulator also includes a voltage booster coupled between an output of the amplifier and a gate of the pass transistor, and a multiplexer having a first input configured to receive a first clock signal, a second input configured to receive a second clock signal having a higher frequency than the first clock signal, and an output coupled to a clock input of the voltage booster. The voltage regulator also includes a detection circuit having an input coupled to the amplifier, and an output coupled to a select input of the multiplexer.