LDO Buffer Stage Circuit for Fast Voltage Transition Rate
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Solution Overview
Problem
Conventional LDO regulator circuits experience abrupt voltage changes due to large power transistors, leading to an over-low voltage transition rate at the gate terminal, which results in unstable output voltages when loading currents change.
Innovation Solution
An LDO regulator apparatus incorporating a buffer stage circuit with a current mirror and native transistors to rapidly control the power transistor's on/off status, enabling improved voltage transition rates by mirroring and generating mirrored currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a large-size power transistor is used in conventional LDO regulator circuit, then the transistor can handle heavy loading currents, but the capacitance value at the gate terminal becomes very large causing slow voltage transition rate
Solution Approach 1:
The patent divides the gate control into two independent paths: a main control path through the operational amplifier for steady-state regulation, and a fast transition path through the buffer stage circuit with current mirror for rapid voltage changes. This segmentation allows the large power transistor to be controlled quickly without reducing its current handling capability.
Solution Approach 2:
The buffer stage circuit acts as an intermediary between the operational amplifier and the power transistor gate. It includes a current mirror that can rapidly charge or discharge the gate capacitance, enabling fast voltage transitions while the operational amplifier provides stable control. This intermediary solves the contradiction by decoupling the speed requirement from the power transistor itself.
2Power
If the capacitance value at the gate terminal is large, then the power transistor can handle heavy currents, but the voltage level at the gate terminal cannot be timely changed when loading current changes
Solution Approach 1:
The buffer stage circuit is pre-configured with the current mirror and associated transistors ready to immediately charge or discharge the gate capacitance when loading current changes are detected. This preliminary preparation eliminates delays in responding to current changes, allowing the system to maintain both high current handling capability and fast response time.
3Device complexity
If conventional LDO regulator circuit is used, then the circuit structure is simple, but abrupt voltage changes occur in output voltage when loading current changes
Solution Approach 1:
The buffer stage circuit serves as an intermediary stage between the operational amplifier and the power transistor, adding only a moderate increase in complexity while dramatically improving output voltage stability. The current mirror in the buffer stage rapidly responds to loading current changes, preventing abrupt output voltage changes that would occur in the simpler conventional circuit.
Data Source
AI summary
A low-drop regulator (LDO) apparatus includes an operational amplifier, a buffer stage circuit, and a power transistor. The operational amplifier is used for receiving a reference voltage and a feedback voltage to generate a first voltage. The buffer stage circuit is coupled to the power transistor and the operational amplifier and used for buffering the first voltage to generate a second voltage. The power transistor is coupled to the buffer stage circuit and used for generating an output voltage according to the second voltage wherein the output voltage is proportional to the feedback voltage. In addition, the buffer stage circuit is arranged to determine whether to mirror and generate a mirrored current according to the first voltage and to generate the second voltage for providing the second voltage to the power transistor to control on/off state of the power transistor when the mirrored current is generated.